Searched refs:VOPC (Results 1 – 11 of 11) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | VOPCInstructions.td | 44 // VOPC classes 47 // VOPC instructions are a special case because for the 32-bit 62 // VOPC DPP Instructions do not need an old operand 152 let VOPC = 1; 164 let VOPC = 1; 317 let VOPC = 1; 379 let VOPC = 1; 872 let VOPC = 1; 919 let VOPC = 1; 1191 let VOPC = 1; [all …]
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| H A D | SIInstrFormats.td | 30 field bit VOPC = 0; 179 let TSFlags{9} = VOPC; 261 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
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| H A D | SIInstrInfo.td | 1483 SDWAVopcDst, // VOPC 1936 (outs), // no dst for VOPC, we use "vcc"-token as dst in SDWA VOPC instructions 1953 string dst = !if(!eq(DstVT.Size, 1), "$sdst", "$vdst"); // use $sdst for VOPC 2026 ""); // use $sdst for VOPC 2054 ""); // use $sdst for VOPC 2098 " vcc", // use vcc token as dst for VOPC instructions 2115 " $src0_sel $src1_sel", // No dst_sel and dst_unused for VOPC 2127 "$sdst", // VOPC 2143 … " $src0_sel $src1_sel", // No dst_sel, dst_unused and output modifiers for VOPC
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| H A D | SIDefines.h | 68 VOPC = 1 << 9, enumerator
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| H A D | SIInstrInfo.h | 521 return MI.getDesc().TSFlags & SIInstrFlags::VOPC; in isVOPC() 525 return get(Opcode).TSFlags & SIInstrFlags::VOPC; in isVOPC()
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| H A D | SISchedule.td | 75 // instructions and have VALU rates, but write to the SALU (i.e. VOPC
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| H A D | AMDGPU.td | 453 "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension" 465 "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
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| H A D | VOPInstructions.td | 541 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 597 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOPC) in getInstruction() 605 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOPC) in getInstruction() 963 } else if ((MCII->get(Opc).TSFlags & SIInstrFlags::VOPC) || in convertDPP8Inst()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 711 (Desc.TSFlags & SIInstrFlags::VOPC) && in needsImpliedVcc() 728 (Desc.TSFlags & SIInstrFlags::VOPC) && in printOperand()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3553 (SIInstrFlags::VOPC | SIInstrFlags::VOP1 | SIInstrFlags::VOP2 | in validateConstantBusLimitations() 4175 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect() 9099 cvtSDWA(Inst, Operands, SIInstrFlags::VOPC, isVI()); in cvtSdwaVOPC() 9132 } else if (BasicInstType == SIInstrFlags::VOPC && in cvtSDWA() 9187 case SIInstrFlags::VOPC: in cvtSDWA()
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