Home
last modified time | relevance | path

Searched refs:VLMul (Results 1 – 10 of 10) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp449 RISCVII::VLMUL VLMul = RISCVII::LMUL_1; member in __anone9ca7dbb0111::VSETVLIInfo
504 RISCVII::VLMUL getVLMUL() const { return VLMul; } in getVLMUL()
542 VLMul = RISCVVType::getVLMUL(VType); in setVTYPE()
550 VLMul = L; in setVTYPE()
556 void setVLMul(RISCVII::VLMUL VLMul) { this->VLMul = VLMul; } in setVLMul() argument
581 return RISCVVType::getSEWLMULRatio(SEW, VLMul); in getSEWLMULRatio()
710 << "VLMul=" << (unsigned)VLMul << ", " in print()
812 RISCVII::VLMUL VLMul) { in computeVLMAX() argument
813 auto [LMul, Fractional] = RISCVVType::decodeVLMUL(VLMul); in computeVLMAX()
852 RISCVII::VLMUL VLMul = RISCVII::getLMul(TSFlags); in computeInfoForInstr() local
[all …]
H A DRISCVInstrInfoVPseudos.td751 let VLMul = m.value;
1529 let VLMul = MInfo.value;
1554 let VLMul = MInfo.value;
2067 let VLMul = m.value in {
2091 let VLMul = m.value in {
2107 let VLMul = m.value in
2512 let VLMul = m.value in {
2545 let VLMul = m.value in {
2562 let VLMul = m.value in
2582 let VLMul = m.value in {
[all …]
H A DRISCVInstrInfoXSf.td310 let VLMul = m.value in {
319 let VLMul = m.value in {
328 let VLMul = m.value in {
337 let VLMul = m.value in {
354 let VLMul = m.value in
360 let VLMul = m.value in
366 let VLMul = m.value in
H A DRISCVInstrInfoZvk.td230 let VLMul = MInfo.value in
236 let VLMul = m.value in {
242 let VLMul = m.value in
338 let VLMul = m.value in {
H A DRISCVInstrFormats.td174 bits<3> VLMul = 0;
175 let TSFlags{10-8} = VLMul;
H A DRISCVRegisterInfo.td485 int VLMul = Vlmul;
H A DRISCVISelDAGToDAG.cpp570 RISCVII::VLMUL VLMul = static_cast<RISCVII::VLMUL>( in selectVSETVLI() local
573 unsigned VTypeI = RISCVVType::encodeVTYPE(VLMul, SEW, /*TailAgnostic*/ true, in selectVSETVLI()
582 if (VLEN / RISCVVType::getSEWLMULRatio(SEW, VLMul) == C->getZExtValue()) in selectVSETVLI()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.cpp201 unsigned RISCVVType::getSEWLMULRatio(unsigned SEW, RISCVII::VLMUL VLMul) { in getSEWLMULRatio() argument
204 std::tie(LMul, Fractional) = decodeVLMUL(VLMul); in getSEWLMULRatio()
H A DRISCVBaseInfo.h536 unsigned getSEWLMULRatio(unsigned SEW, RISCVII::VLMUL VLMul);
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCA/
H A DRISCVCustomBehaviour.cpp33 uint8_t VLMul; member