Searched refs:UseOp (Results 1 – 9 of 9) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 297 const MachineOperand *UseOp = in addLinkerOpt() local 301 if (UseOp && UseOp->isReg() && UseOp->getReg() == Pair.DefReg && in addLinkerOpt() 302 UseOp->isUse() && UseOp->isKill()) { in addLinkerOpt()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineTraceMetrics.cpp | 648 unsigned UseOp; member 650 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) in DataDep() 651 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep() 654 DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp) in DataDep() 655 : UseOp(UseOp) { in DataDep() 817 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp); in updateDepth() 969 Dep.UseOp); in pushDepHeight() 1196 &PHI, Dep.UseOp); in getPHIDepth()
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| H A D | TwoAddressInstructionPass.cpp | 417 MachineOperand *UseOp = nullptr; in findOnlyInterestingUse() local 423 UseOp = &MO; in findOnlyInterestingUse() 425 if (!UseOp) in findOnlyInterestingUse() 427 MachineInstr &UseMI = *UseOp->getParent(); in findOnlyInterestingUse() 442 unsigned Src2 = UseOp->getOperandNo(); in findOnlyInterestingUse()
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| H A D | ModuloSchedule.cpp | 81 for (MachineOperand &UseOp : MRI.use_operands(Reg)) { in expand() 82 MachineInstr *UseMI = UseOp.getParent(); in expand() 1145 for (MachineOperand &UseOp : in rewriteScheduledInstr() 1147 MachineInstr *UseMI = UseOp.getParent(); in rewriteScheduledInstr() 1185 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr() 1191 UseOp.setReg(SplitReg); in rewriteScheduledInstr()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 716 MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); in tryToFoldACImm() local 717 if (!UseOp.getSubReg() && Def && TII->isFoldableCopy(*Def)) { in tryToFoldACImm() 759 const MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); in foldOperand() local 761 if (!isUseSafeToFold(*UseMI, UseOp)) in foldOperand() 765 if (UseOp.isReg() && OpToFold.isReg() && in foldOperand() 766 (UseOp.isImplicit() || UseOp.getSubReg() != AMDGPU::NoSubRegister)) in foldOperand() 1030 if (UseDesc.isVariadic() || UseOp.isImplicit() || in foldOperand() 1065 if (UseOp.getSubReg() && AMDGPU::getRegBitWidth(*FoldRC) == 64) { in foldOperand() 1066 Register UseReg = UseOp.getReg(); in foldOperand() 1072 if (UseOp.getSubReg() == AMDGPU::sub0) { in foldOperand() [all …]
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| H A D | AMDGPUResourceUsageAnalysis.cpp | 75 for (const MachineOperand &UseOp : MRI.reg_operands(Reg)) { in hasAnyNonFlatUseOfReg() local 76 if (!UseOp.isImplicit() || !TII.isFLAT(*UseOp.getParent())) in hasAnyNonFlatUseOfReg()
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| H A D | SIInstrInfo.cpp | 3378 auto getImmFor = [ImmOp](const MachineOperand &UseOp) -> int64_t { in FoldImmediate() argument 3380 switch (UseOp.getSubReg()) { in FoldImmediate()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 5352 int UseOp = -1; in getPartialRegUpdateClearance() local 5364 UseOp = MI.findRegisterUseOperandIdx(Reg, false, TRI); in getPartialRegUpdateClearance() 5369 UseOp = 3; in getPartialRegUpdateClearance() 5377 if (UseOp != -1 && MI.getOperand(UseOp).readsReg()) in getPartialRegUpdateClearance()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12827 SDValue UseOp = User->getOperand(i); in ExtendUsesToFormExtLoad() local 12828 if (UseOp == N0) in ExtendUsesToFormExtLoad() 12830 if (!isa<ConstantSDNode>(UseOp)) in ExtendUsesToFormExtLoad()
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