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Searched refs:UseMO (Results 1 – 18 of 18) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRVVInitUndef.cpp148 for (auto &UseMO : MI->uses()) { in handleReg() local
149 if (!UseMO.isReg()) in handleReg()
151 if (UseMO.isTied()) in handleReg()
153 if (!UseMO.getReg().isVirtual()) in handleReg()
158 if (UseMO.isUndef() || findImplictDefMIFromReg(UseMO.getReg(), MRI)) in handleReg()
169 if (!UseMO.isReg()) in handleSubReg()
171 if (!UseMO.getReg().isVirtual()) in handleSubReg()
173 if (UseMO.isTied()) in handleSubReg()
176 Register Reg = UseMO.getReg(); in handleSubReg()
220 UseMO.setReg(LatestReg); in handleSubReg()
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H A DRISCVInsertVSETVLI.cpp189 const MachineOperand &UseMO = MI.getOperand(UseOpIdx); in hasUndefinedMergeOp() local
190 if (UseMO.getReg() == RISCV::NoRegister) in hasUndefinedMergeOp()
193 if (MachineInstr *UseMI = MRI.getVRegDef(UseMO.getReg())) { in hasUndefinedMergeOp()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenCommonISel.cpp285 auto &UseMO = DbgMI->getOperand(UseMOIdx); in salvageDebugInfoForDbgValue() local
286 UseMO.setReg(Op0->getReg()); in salvageDebugInfoForDbgValue()
287 UseMO.setSubReg(Op0->getSubReg()); in salvageDebugInfoForDbgValue()
H A DTailDuplicator.cpp216 for (MachineOperand &UseMO : in tailDuplicateAndUpdate()
218 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate()
224 DebugUses.push_back(&UseMO); in tailDuplicateAndUpdate()
229 SSAUpdate.RewriteUse(UseMO); in tailDuplicateAndUpdate()
231 for (auto *UseMO : DebugUses) { in tailDuplicateAndUpdate() local
232 MachineInstr *UseMI = UseMO->getParent(); in tailDuplicateAndUpdate()
233 UseMO->setReg( in tailDuplicateAndUpdate()
H A DPeepholeOptimizer.cpp546 for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg)) { in INITIALIZE_PASS_DEPENDENCY()
547 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY()
557 if (UseSrcSubIdx && UseMO.getSubReg() != SubIdx) in INITIALIZE_PASS_DEPENDENCY()
584 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
588 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
592 ExtendedUses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
619 MachineOperand *UseMO = Uses[i]; in INITIALIZE_PASS_DEPENDENCY() local
620 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY()
653 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY()
655 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
H A DMachineCombiner.cpp282 MachineInstr *UseMO = RI->getParent(); in getLatency() local
284 if (UseMO && BlockTrace.isDepInTrace(*Root, *UseMO)) { in getLatency()
286 NewRoot, NewRoot->findRegisterDefOperandIdx(MO.getReg()), UseMO, in getLatency()
287 UseMO->findRegisterUseOperandIdx(MO.getReg())); in getLatency()
H A DLiveVariables.cpp672 for (auto &UseMO : MRI->use_nodbg_operands(Reg)) { in recomputeForSingleDefVirtReg() local
673 UseMO.setIsKill(false); in recomputeForSingleDefVirtReg()
674 if (!UseMO.readsReg()) in recomputeForSingleDefVirtReg()
677 MachineInstr &UseMI = *UseMO.getParent(); in recomputeForSingleDefVirtReg()
683 unsigned Idx = UseMO.getOperandNo(); in recomputeForSingleDefVirtReg()
H A DMachineInstr.cpp1123 MachineOperand &UseMO = getOperand(UseIdx); in tieOperands() local
1125 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands()
1127 assert(!UseMO.isTied() && "Use is already tied to another def"); in tieOperands()
1130 UseMO.TiedTo = DefIdx + 1; in tieOperands()
1138 UseMO.TiedTo = TiedMax; in tieOperands()
1163 const MachineOperand &UseMO = getOperand(i); in findTiedOperandIdx() local
1164 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
H A DRegisterCoalescer.cpp924 for (MachineOperand &UseMO : in removeCopyByCommutingDef()
926 if (UseMO.isUndef()) in removeCopyByCommutingDef()
928 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef()
932 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
941 UseMO.setIsKill(false); in removeCopyByCommutingDef()
943 UseMO.substPhysReg(NewReg, *TRI); in removeCopyByCommutingDef()
945 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
1634 for (MachineOperand &UseMO : in reMaterializeTrivialDef()
1639 UseMO.substPhysReg(DstReg, *TRI); in reMaterializeTrivialDef()
1641 UseMO.setReg(DstReg); in reMaterializeTrivialDef()
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H A DTwoAddressInstructionPass.cpp1941 MachineOperand &UseMO = MI.getOperand(i); in eliminateRegSequence() local
1942 Register SrcReg = UseMO.getReg(); in eliminateRegSequence()
1945 if (UseMO.isUndef()) { in eliminateRegSequence()
1952 bool isKill = UseMO.isKill(); in eliminateRegSequence()
1957 UseMO.setIsKill(false); in eliminateRegSequence()
1966 .add(UseMO); in eliminateRegSequence()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp285 MachineOperand &UseMO = *UI; in processBlock() local
286 MachineInstr *UseMI = UseMO.getParent(); in processBlock()
293 UseMO.substVirtReg(KilledProdReg, KilledProdSubReg, *TRI); in processBlock()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LoadValueInjectionLoadHardening.cpp394 MachineOperand &UseMO = Use.Addr->getOp(); in getGadgetGraph() local
395 MachineInstr &UseMI = *UseMO.getParent(); in getGadgetGraph()
396 assert(UseMO.isReg()); in getGadgetGraph()
406 if (instrUsesRegToAccessMemory(UseMI, UseMO.getReg()) || in getGadgetGraph()
408 instrUsesRegToBranch(UseMI, UseMO.getReg()))) { in getGadgetGraph()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp271 for (MachineOperand &UseMO : MRI->use_nodbg_operands(Reg->getReg())) { in findSingleRegUse()
273 if (!isSameReg(UseMO, *Reg)) in findSingleRegUse()
278 ResMO = &UseMO; in findSingleRegUse()
279 } else if (ResMO->getParent() != UseMO.getParent()) { in findSingleRegUse()
H A DSIInstrInfo.h1000 const MachineOperand &UseMO, in isInlineConstant() argument
1002 assert(UseMO.getParent() == &MI); in isInlineConstant()
1003 int OpIdx = UseMO.getOperandNo(); in isInlineConstant()
H A DSIInstrInfo.cpp2532 MachineOperand *UseMO = nullptr; in reMaterialize() local
2536 if (UseMO) { in reMaterialize()
2537 UseMO = nullptr; in reMaterialize()
2540 UseMO = &CandMO; in reMaterialize()
2542 if (!UseMO || UseMO->getSubReg() == AMDGPU::NoSubRegister) in reMaterialize()
2545 unsigned Offset = RI.getSubRegIdxOffset(UseMO->getSubReg()); in reMaterialize()
2546 unsigned SubregSize = RI.getSubRegIdxSize(UseMO->getSubReg()); in reMaterialize()
2565 UseMO->setReg(DestReg); in reMaterialize()
2566 UseMO->setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
H A DSIFoldOperands.cpp91 const MachineOperand &UseMO) const;
647 const MachineOperand &UseMO) const { in isUseSafeToFold()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp496 MachineOperand &UseMO)> in InsertInsnsWithoutSideEffectsBeforeUse()
498 MachineInstr &UseMI = *UseMO.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse()
504 MachineOperand *PredBB = std::next(&UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
637 Observer.changingInstr(*UseMO.getParent()); in applyCombineExtendingLoads()
639 Observer.changedInstr(*UseMO.getParent()); in applyCombineExtendingLoads()
647 replaceRegOpWith(MRI, UseMO, NewDstReg); in applyCombineExtendingLoads()
658 Uses.push_back(&UseMO); in applyCombineExtendingLoads()
660 for (auto *UseMO : Uses) { in applyCombineExtendingLoads() local
661 MachineInstr *UseMI = UseMO->getParent(); in applyCombineExtendingLoads()
683 UseMO->getParent()->eraseFromParent(); in applyCombineExtendingLoads()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp4317 const MachineOperand &UseMO = UseMI.getOperand(UseIdx); in getOperandLatency() local
4318 if (UseMO.isImplicit()) { in getOperandLatency()
4319 for (MCPhysReg SR : HRI.superregs(UseMO.getReg())) { in getOperandLatency()