| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 187 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
197 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
201 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
210 unsigned UseIdx) const { in getOperandLatency() argument
215 std::optional<unsigned> UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
224 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
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| H A D | MCSubtargetInfo.h | 184 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
191 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
193 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
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| H A D | MCSchedule.h | 104 unsigned UseIdx; member
109 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 680 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
682 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
683 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
691 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
699 if (SwapVector[UseIdx].IsSwap && !SwapVector[UseIdx].IsLoad && in recordUnoptimizableWebs()
700 !SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
746 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
757 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
758 LLVM_DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs()
788 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
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| H A D | PPCInstrInfo.h | 328 unsigned UseIdx) const override;
332 unsigned UseIdx) const override { in getOperandLatency() argument
334 UseNode, UseIdx); in getOperandLatency()
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| H A D | PPCInstrInfo.cpp | 170 unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const { in getOperandLatency()
172 ItinData, DefMI, DefIdx, UseMI, UseIdx); in getOperandLatency()
2055 unsigned UseIdx; in onlyFoldImmediate() local
2056 for (UseIdx = 0; UseIdx < UseMI.getNumOperands(); ++UseIdx) in onlyFoldImmediate()
2057 if (UseMI.getOperand(UseIdx).isReg() && in onlyFoldImmediate()
2058 UseMI.getOperand(UseIdx).getReg() == Reg) in onlyFoldImmediate()
2061 assert(UseIdx < UseMI.getNumOperands() && "Cannot find Reg in UseMI"); in onlyFoldImmediate()
2062 assert(UseIdx < UseMCID.getNumOperands() && "No operand description for Reg"); in onlyFoldImmediate()
2064 const MCOperandInfo *UseInfo = &UseMCID.operands()[UseIdx]; in onlyFoldImmediate()
2094 UseMI.getOperand(UseIdx).setReg(ZeroReg); in onlyFoldImmediate()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 108 SlotIndex UseIdx) const { in allUsesAvailableAt()
110 UseIdx = std::max(UseIdx, UseIdx.getRegSlot(true)); in allUsesAvailableAt()
131 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
134 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
146 if (!SR.liveAt(UseIdx)) in allUsesAvailableAt()
159 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
176 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
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| H A D | LiveIntervalCalc.cpp | 171 SlotIndex UseIdx; in extendToUses() local
176 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo + 1).getMBB()); in extendToUses()
188 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses()
193 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
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| H A D | TargetSchedule.cpp | 162 unsigned UseIdx = 0; in findUseIdx() local
166 ++UseIdx; in findUseIdx()
168 return UseIdx; in findUseIdx()
216 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
217 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
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| H A D | InlineSpiller.cpp | 631 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor() local
632 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor()
639 LLVM_DEBUG(dbgs() << UseIdx << '\t' << MI); in reMaterializeFor()
647 VNInfo *OrigVNI = OrigLI.getVNInfoAt(UseIdx); in reMaterializeFor()
651 if (!Edit->canRematerializeAt(RM, OrigVNI, UseIdx, false)) { in reMaterializeFor()
653 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor()
661 LLVM_DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << MI); in reMaterializeFor()
678 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor()
706 LLVM_DEBUG(dbgs() << "\t " << UseIdx << '\t' << MI << '\n'); in reMaterializeFor()
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| H A D | RegisterCoalescer.cpp | 885 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
956 SlotIndex DefIdx = UseIdx.getRegSlot(); in removeCopyByCommutingDef()
1227 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in removePartialRedundancy() local
1228 if (!IntB.liveAt(UseIdx)) in removePartialRedundancy()
1756 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1764 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy()
1770 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy()
1799 if (S.liveAt(UseIdx)) { in addUndefFlag()
1810 LiveQueryResult Q = Int.Query(UseIdx); in addUndefFlag()
1830 addUndefFlag(*DstInt, UseIdx, MO, SubReg); in updateRegDefsUses()
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| H A D | MachineCopyPropagation.cpp | 421 const MachineInstr &UseI, unsigned UseIdx);
424 unsigned UseIdx);
538 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy() argument
544 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isBackwardPropagatableRegClassCopy()
557 unsigned UseIdx) { in isForwardableRegClassCopy() argument
565 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isForwardableRegClassCopy()
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| H A D | MachineVerifier.cpp | 2432 LiveQueryResult LRQ = LR.Query(UseIdx); in checkLivenessAtUse()
2440 report_context(UseIdx); in checkLivenessAtUse()
2448 report_context(UseIdx); in checkLivenessAtUse()
2542 SlotIndex UseIdx; in checkLiveness() local
2545 UseIdx = LiveInts->getMBBEndIdx( in checkLiveness()
2548 UseIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness()
2556 checkLivenessAtUse(MO, MONum, UseIdx, *LR, Unit); in checkLiveness()
2562 checkLivenessAtUse(MO, MONum, UseIdx, *LI, Reg); in checkLiveness()
2573 LiveQueryResult LRQ = SR.Query(UseIdx); in checkLiveness()
2581 report_context(UseIdx); in checkLiveness()
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| H A D | MachineCombiner.cpp | 236 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth() local
238 InstrPtr, UseIdx); in getDepth()
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| H A D | SplitKit.h | 385 SlotIndex UseIdx, MachineBasicBlock &MBB,
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| H A D | TargetInstrInfo.cpp | 1384 SDNode *UseNode, unsigned UseIdx) const { in getOperandLatency()
1395 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1585 unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const { in getOperandLatency()
1588 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AbstractCallSite.cpp | 100 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local
107 if (CBCalleeIdx != UseIdx) in AbstractCallSite()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 323 unsigned UseIdx) const override;
327 unsigned UseIdx) const override;
436 unsigned UseClass, unsigned UseIdx,
440 unsigned UseClass, unsigned UseIdx,
446 unsigned UseIdx,
453 unsigned UseIdx, const MCInstrDesc &UseMCID, unsigned UseAdj) const;
468 unsigned UseIdx) const override;
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| H A D | ARMBaseInstrInfo.cpp | 3953 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getVSTMUseCycle()
3955 return ItinData->getOperandCycle(UseClass, UseIdx); in getVSTMUseCycle()
3992 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getSTMUseCycle()
3994 return ItinData->getOperandCycle(UseClass, UseIdx); in getSTMUseCycle()
4019 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency() argument
4074 UseCycle = ItinData->getOperandCycle(UseClass, UseIdx); in getOperandLatency()
4118 UseClass, UseIdx)) in getOperandLatency()
4121 UseClass, UseIdx)) { in getOperandLatency()
4177 UseIdx = Idx; in getBundledUseMI()
4393 Reg, *ResolvedUseMI, UseIdx, ResolvedUseMI->getDesc(), UseAdj); in getOperandLatency()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveRangeEdit.h | 199 SlotIndex UseIdx) const;
204 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
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| H A D | TargetInstrInfo.h | 1735 unsigned DefIdx, SDNode *UseNode, unsigned UseIdx) const;
1748 const MachineInstr &UseMI, unsigned UseIdx) const;
1778 unsigned UseIdx) const { in hasHighOperandLatency() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 473 int UseIdx = -1; in adjustSchedDependency() local
477 UseIdx = OpNum; in adjustSchedDependency()
482 if (UseIdx == -1) in adjustSchedDependency()
486 InstrInfo.getOperandLatency(&InstrItins, *SrcInst, 0, *DDst, UseIdx); in adjustSchedDependency()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 702 unsigned UseIdx; in FoldImmediate() local
707 UseIdx = 2; in FoldImmediate()
730 UseIdx = 1; in FoldImmediate()
738 UseIdx = 2; in FoldImmediate()
747 UseMI.getOperand(1).setReg(UseMI.getOperand(UseIdx).getReg()); in FoldImmediate()
749 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | SubtargetEmitter.cpp | 1248 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables() local
1249 UseIdx != EndIdx; ++UseIdx) { in GenSchedClassTables()
1251 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel); in GenSchedClassTables()
1272 RAEntry.UseIdx = UseIdx; in GenSchedClassTables()
1380 OS << " {" << RAEntry.UseIdx << ", " in EmitSchedClassTables()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 639 unsigned UseIdx; in FoldImmediate() local
651 UseIdx = 2; in FoldImmediate()
653 UseIdx = 2, CommuteIdx = 1; in FoldImmediate()
665 UseIdx = 2; in FoldImmediate()
667 UseIdx = 2, CommuteIdx = 1; in FoldImmediate()
676 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx)) in FoldImmediate()
683 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
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