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Searched refs:TypeWidenVector (Results 1 – 18 of 18) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1064 return LegalizeKind(TypeWidenVector, NVT); in getTypeConversion()
1127 return LegalizeKind(TypeWidenVector, LargerVector); in getTypeConversion()
1133 return LegalizeKind(TypeWidenVector, NVT); in getTypeConversion()
1495 case TypeWidenVector: in computeRegisterProperties()
1508 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties()
1520 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties()
1556 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties()
1610 (TA == TypeWidenVector || TA == TypePromoteInteger)) { in getVectorTypeBreakdown()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1362 case TargetLowering::TypeWidenVector: in SplitVecRes_BITCAST()
5072 case TargetLowering::TypeWidenVector: in WidenVecRes_BITCAST()
5422 TargetLowering::TypeWidenVector && in WidenVecRes_VP_LOAD()
5446 TargetLowering::TypeWidenVector && in WidenVecRes_VP_STRIDED_LOAD()
6155 TargetLowering::TypeWidenVector && in WidenVecOp_EXTEND()
6250 TargetLowering::TypeWidenVector && in WidenVecOp_Convert()
6403 TargetLowering::TypeWidenVector && in WidenVecOp_CONCAT_VECTORS()
6532 TargetLowering::TypeWidenVector && in WidenVecOp_VP_STORE()
6541 TargetLowering::TypeWidenVector && in WidenVecOp_VP_STORE()
6567 TargetLowering::TypeWidenVector && in WidenVecOp_VP_STRIDED_STORE()
[all …]
H A DLegalizeTypes.cpp285 case TargetLowering::TypeWidenVector: in run()
348 case TargetLowering::TypeWidenVector: in run()
H A DLegalizeTypesGeneric.cpp88 case TargetLowering::TypeWidenVector: { in ExpandRes_BITCAST()
H A DLegalizeTypes.h952 TargetLowering::TypeWidenVector && in GetWidenedMask()
H A DLegalizeIntegerTypes.cpp471 case TargetLowering::TypeWidenVector: in PromoteIntRes_BITCAST()
1534 case TargetLowering::TypeWidenVector: { in PromoteIntRes_TRUNCATE()
5585 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { in PromoteIntRes_EXTRACT_SUBVECTOR()
H A DLegalizeFloatTypes.cpp2528 case TargetLowering::TypeWidenVector: { in PromoteFloatRes_EXTRACT_VECTOR_ELT()
H A DSelectionDAGBuilder.cpp716 TargetLowering::TypeWidenVector) { in getCopyToPartsVector()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h435 return TypeWidenVector; in getPreferredVectorAction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp233 return Action == TargetLoweringBase::TypeWidenVector; in isTypeForHVX()
H A DHexagonISelLoweringHVX.cpp417 if (Action == TargetLoweringBase::TypeWidenVector) { in initializeHVXLowering()
476 return TargetLoweringBase::TypeWidenVector; in getPreferredHvxVectorAction()
478 return TargetLoweringBase::TypeWidenVector; in getPreferredHvxVectorAction()
3660 if (Action == TargetLoweringBase::TypeWidenVector) in shouldWidenToHvx()
H A DHexagonISelLowering.cpp2203 return TargetLoweringBase::TypeWidenVector; in getPreferredVectorAction()
2208 return TargetLoweringBase::TypeWidenVector; in getPreferredVectorAction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h774 return TypeWidenVector; in getPreferredVectorAction()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h215 TypeWidenVector, // This vector should be widened into a larger vector. enumerator
503 return TypeWidenVector; in getPreferredVectorAction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp947 return TypeWidenVector; in getPreferredVectorAction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2544 return TypeWidenVector; in getPreferredVectorAction()
24511 TargetLowering::TypeWidenVector && in LowerStore()
32075 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
32094 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
32136 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
32178 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
32203 if (getTypeAction(*DAG.getContext(), VT) != TypeWidenVector) in ReplaceNodeResults()
32450 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
32501 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
33034 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1857 return VT.isPow2VectorType() ? TypeSplitVector : TypeWidenVector; in getPreferredVectorAction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp24980 return TypeWidenVector; in getPreferredVectorAction()