| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 724 SDValue combineTruncateExtract(const SDLoc &DL, EVT TruncVT, SDValue Op,
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| H A D | SystemZISelLowering.cpp | 6569 const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const { in combineTruncateExtract() argument
6574 TruncVT.getSizeInBits() % 8 == 0) { in combineTruncateExtract()
6580 unsigned TruncBytes = TruncVT.getStoreSize(); in combineTruncateExtract()
6594 EVT ResVT = (TruncBytes < 4 ? MVT::i32 : TruncVT); in combineTruncateExtract()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 6793 EVT TruncVT = TLI->getValueType(*DL, I->getType()); in optimizeLoadExt() local
6794 unsigned TruncBitWidth = TruncVT.getSizeInBits(); in optimizeLoadExt()
6822 EVT TruncVT = TLI->getValueType(*DL, TruncTy); in optimizeLoadExt() local
6825 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() || in optimizeLoadExt()
6826 !TLI->isLoadExtLegal(ISD::ZEXTLOAD, LoadResultVT, TruncVT)) in optimizeLoadExt()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1057 bool preferSextInRegOfTruncate(EVT TruncVT, EVT VT,
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| H A D | X86ISelLowering.cpp | 9972 MVT TruncVT = MVT::getVectorVT(DstSVT, NumSrcElts); in getAVX512TruncNode() local
9978 MVT TruncVT = MVT::getVectorVT(DstSVT, NumSrcElts); in getAVX512TruncNode() local
9994 if (DstVT != TruncVT) in getAVX512TruncNode()
20421 MVT TruncVT = MVT::getVectorVT(MVT::i32, NumElems); in LowerTruncateVecPack() local
20696 MVT TruncVT = MVT::v4i1; in LowerFP_TO_INT() local
20707 TruncVT = MVT::v8i1; in LowerFP_TO_INT()
50545 TLI.isTruncStoreLegal(SrcVT, TruncVT)) { in combineStore()
53539 EVT TruncVT = Trunc.getValueType(); in combineToFPTruncExtElt() local
53541 unsigned DestWidth = TruncVT.getSizeInBits(); in combineToFPTruncExtElt()
53683 EVT TruncVT = MVT::i32; in combineSIntToFP() local
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9747 EVT TruncVT = N->getValueType(0); in distributeTruncateThroughAnd() local
9749 TLI.isTypeDesirableForOp(ISD::AND, TruncVT)) { in distributeTruncateThroughAnd()
9758 return DAG.getNode(ISD::AND, DL, TruncVT, Trunc00, Trunc01); in distributeTruncateThroughAnd()
10371 TruncVT = EVT::getVectorVT(Ctx, TruncVT, VT.getVectorElementCount()); in visitSRA()
10383 TLI.isTruncateFree(VT, TruncVT)) { in visitSRA()
10389 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, TruncVT, in visitSRA()
10417 TruncVT = EVT::getVectorVT(Ctx, TruncVT, VT.getVectorElementCount()); in visitSRA()
10423 if (TruncVT.isSimple() && isTypeLegal(TruncVT) && in visitSRA()
10424 TLI.isTruncateFree(VT, TruncVT)) { in visitSRA()
10429 TruncVT.getScalarSizeInBits()), in visitSRA()
[all …]
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| H A D | LegalizeIntegerTypes.cpp | 1539 EVT TruncVT = EVT::getVectorVT(*DAG.getContext(), in PromoteIntRes_TRUNCATE() local
1541 SDValue WideTrunc = DAG.getNode(ISD::TRUNCATE, dl, TruncVT, WideInOp); in PromoteIntRes_TRUNCATE()
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| H A D | LegalizeVectorTypes.cpp | 5646 EVT TruncVT = EVT::getVectorVT(Ctx, ToMaskVT.getVectorElementType(), in convertMask() local
5648 Mask = DAG.getNode(ISD::TRUNCATE, SDLoc(Mask), TruncVT, Mask); in convertMask()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 877 virtual bool preferSextInRegOfTruncate(EVT TruncVT, EVT VT, EVT ExtVT) const { in preferSextInRegOfTruncate() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 10018 EVT TruncVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits()); in widenLoad() local
10022 TruncVT = MemVT.changeTypeToInteger(); in widenLoad()
10028 DAG.getValueType(TruncVT)); in widenLoad()
10031 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4520 MVT TruncVT = MVT::getVectorVT(MVT::getIntegerVT(EltSize), NumElts); in skipExtensionForVectorMULL() local
4524 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), TruncVT, N); in skipExtensionForVectorMULL()
4540 return DAG.getBuildVector(TruncVT, dl, Ops); in skipExtensionForVectorMULL()
25888 EVT TruncVT = ContainerVT.changeVectorElementType( in LowerFixedLengthVectorStoreToSVE() local
25891 NewValue = DAG.getNode(AArch64ISD::FP_ROUND_MERGE_PASSTHRU, DL, TruncVT, Pg, in LowerFixedLengthVectorStoreToSVE()
25893 DAG.getUNDEF(TruncVT)); in LowerFixedLengthVectorStoreToSVE()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9575 MVT TruncVT = MVT::getIntegerVT(EltSize); in SkipExtensionForVMULL() local
9584 return DAG.getBuildVector(MVT::getVectorVT(TruncVT, NumElts), dl, Ops); in SkipExtensionForVMULL()
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