| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMemIntrinsicResults.cpp | 85 unsigned FromReg, unsigned ToReg, in replaceDominatedUses() argument
92 LiveInterval *ToLI = &LIS.getInterval(ToReg); in replaceDominatedUses()
121 O.setReg(ToReg); in replaceDominatedUses()
169 Register ToReg = MI.getOperand(0).getReg(); in optimizeCall() local
170 if (MRI.getRegClass(FromReg) != MRI.getRegClass(ToReg)) in optimizeCall()
173 return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); in optimizeCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 82 return I->ToReg; in getDwarfRegNum()
95 return I->ToReg; in getLLVMRegNum()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 121 bool isRevCopyChain(Register FromReg, Register ToReg, int Maxlen);
246 bool TwoAddressInstructionPass::isRevCopyChain(Register FromReg, Register ToReg, in isRevCopyChain() argument
256 if (TmpReg == ToReg) in isRevCopyChain()
489 Register ToReg = SI.second; in removeMapRegEntry() local
490 if (ToReg.isVirtual()) in removeMapRegEntry()
495 if (TRI->regsOverlap(ToReg, Reg)) in removeMapRegEntry()
497 } else if (MO.clobbersPhysReg(ToReg)) in removeMapRegEntry()
781 unsigned ToReg = VirtRegPairs.back(); in scanUses() local
785 bool isNew = DstRegMap.insert(std::make_pair(FromReg, ToReg)).second; in scanUses()
788 ToReg = FromReg; in scanUses()
[all …]
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| H A D | MachineRegisterInfo.cpp | 380 void MachineRegisterInfo::replaceRegWith(Register FromReg, Register ToReg) { in replaceRegWith() argument
381 assert(FromReg != ToReg && "Cannot replace a reg with itself"); in replaceRegWith()
387 if (ToReg.isPhysical()) { in replaceRegWith()
388 O.substPhysReg(ToReg, *TRI); in replaceRegWith()
390 O.setReg(ToReg); in replaceRegWith()
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| H A D | SplitKit.h | 432 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
436 SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
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| H A D | SplitKit.cpp | 529 Register FromReg, Register ToReg, MachineBasicBlock &MBB, in buildSingleSubRegCopy() argument
534 .addReg(ToReg, RegState::Define | getUndefRegState(FirstCopy) in buildSingleSubRegCopy()
547 SlotIndex SplitEditor::buildCopy(Register FromReg, Register ToReg, in buildCopy() argument
556 BuildMI(MBB, InsertBefore, DebugLoc(), Desc, ToReg).addReg(FromReg); in buildCopy()
568 assert(RC == MRI.getRegClass(ToReg) && "Should have same reg class"); in buildCopy()
578 Def = buildSingleSubRegCopy(FromReg, ToReg, MBB, InsertBefore, BestIdx, in buildCopy()
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| H A D | MachineInstr.cpp | 1232 void MachineInstr::substituteRegister(Register FromReg, Register ToReg, in substituteRegister() argument
1235 if (ToReg.isPhysical()) { in substituteRegister()
1237 ToReg = RegInfo.getSubReg(ToReg, SubIdx); in substituteRegister()
1241 MO.substPhysReg(ToReg, RegInfo); in substituteRegister()
1247 MO.substVirtReg(ToReg, SubIdx, RegInfo); in substituteRegister()
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| H A D | ModuloSchedule.cpp | 337 static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg, in replaceRegUsesAfterLoop() argument
344 O.setReg(ToReg); in replaceRegUsesAfterLoop()
345 if (!LIS.hasInterval(ToReg)) in replaceRegUsesAfterLoop()
346 LIS.createEmptyInterval(ToReg); in replaceRegUsesAfterLoop()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 147 void replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const;
152 Register ToReg) const;
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 147 unsigned ToReg; member
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 5704 Register ToReg = UseMI.getOperand(0).getReg(); in FoldImmediateImpl() local
5706 if (ToReg.isVirtual()) in FoldImmediateImpl()
5707 RC = MRI->getRegClass(ToReg); in FoldImmediateImpl()
5708 bool GR32Reg = (ToReg.isVirtual() && X86::GR32RegClass.hasSubClassEq(RC)) || in FoldImmediateImpl()
5709 (ToReg.isPhysical() && X86::GR32RegClass.contains(ToReg)); in FoldImmediateImpl()
5710 bool GR64Reg = (ToReg.isVirtual() && X86::GR64RegClass.hasSubClassEq(RC)) || in FoldImmediateImpl()
5711 (ToReg.isPhysical() && X86::GR64RegClass.contains(ToReg)); in FoldImmediateImpl()
5712 bool GR8Reg = (ToReg.isVirtual() && X86::GR8RegClass.hasSubClassEq(RC)) || in FoldImmediateImpl()
5713 (ToReg.isPhysical() && X86::GR8RegClass.contains(ToReg)); in FoldImmediateImpl()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1879 void replaceAllRegUsesWith(Register FromReg, Register ToReg);
3125 Register ToReg) { in replaceAllRegUsesWith() argument
3127 assert(ToReg.isVirtual()); in replaceAllRegUsesWith()
3130 O.setReg(ToReg); in replaceAllRegUsesWith()
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| H A D | HexagonISelLowering.cpp | 2810 SDValue ToReg = getInstr(Hexagon::C2_tfrpr, dl, MVT::i32, {VecV}, DAG); in insertVectorPred() local
2815 DAG.getNode(HexagonISD::INSERT, dl, MVT::i32, {ToReg, Ext, Width, Idx}); in insertVectorPred()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 627 void replaceRegWith(Register FromReg, Register ToReg);
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| H A D | MachineInstr.h | 1649 void substituteRegister(Register FromReg, Register ToReg, unsigned SubIdx,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 162 Register ToReg) const { in replaceRegWith()
165 if (MRI.constrainRegAttrs(ToReg, FromReg)) in replaceRegWith()
166 MRI.replaceRegWith(FromReg, ToReg); in replaceRegWith()
168 Builder.buildCopy(ToReg, FromReg); in replaceRegWith()
175 Register ToReg) const { in replaceRegOpWith()
179 FromRegOp.setReg(ToReg); in replaceRegOpWith()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6500 SDValue ToReg = DAG.getCopyToReg(Chain, SL, SGPR01, in lowerTrapHsaQueuePtr() local
6505 ToReg, in lowerTrapHsaQueuePtr()
6508 ToReg.getValue(1) in lowerTrapHsaQueuePtr()
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