Searched refs:TmpReg0 (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 2308 Register TmpReg0 = MRI->createVirtualRegister(DstRC); in selectG_TRUNC() local
2312 BuildMI(*MBB, I, DL, TII.get(AMDGPU::V_LSHLREV_B32_e64), TmpReg0) in selectG_TRUNC()
2316 BuildMI(*MBB, I, DL, TII.get(AMDGPU::S_LSHL_B32), TmpReg0) in selectG_TRUNC()
2332 .addReg(TmpReg0) in selectG_TRUNC()
5588 Register TmpReg0; in selectNamedBarrierInst() local
5593 TmpReg0 = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectNamedBarrierInst()
5596 BuildMI(*MBB, &I, DL, TII.get(AMDGPU::S_LSHL_B32), TmpReg0) in selectNamedBarrierInst()
5599 M0Val = TmpReg0; in selectNamedBarrierInst()
5611 .addReg(TmpReg0); in selectNamedBarrierInst()
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| H A D | AMDGPURegisterBankInfo.cpp | 1855 Register TmpReg0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in buildVCopy() local
1859 .addDef(TmpReg0) in buildVCopy()
1866 .addUse(TmpReg0) in buildVCopy()
2903 Register TmpReg0 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl() local
2905 MRI.setRegBank(TmpReg0, AMDGPU::SGPRRegBank); in applyMappingImpl()
2908 Extract0->getOperand(0).setReg(TmpReg0); in applyMappingImpl()
2913 buildVCopy(B, DstRegs[0], TmpReg0); in applyMappingImpl()
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