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Searched refs:TmpReg (Results 1 – 25 of 47) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp300 Register TmpReg = VE::SX16; in processSTVM() local
305 TmpReg, getKillRegState(true)); in processSTVM()
337 unsigned TmpReg = VE::SX16; in processLDVM() local
356 .addReg(TmpReg, getKillRegState(true)) in processLDVM()
380 Register TmpReg = VE::SX16; in processSTVM512() local
387 TmpReg, getKillRegState(true)); in processSTVM512()
398 TmpReg, getKillRegState(true)); in processSTVM512()
425 Register TmpReg = VE::SX16; in processLDVM512() local
433 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
443 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
[all …]
H A DVEInstrInfo.cpp376 Register TmpReg = VE::SX16; in copyPhysReg() local
377 Register SubTmp = TRI->getSubReg(TmpReg, VE::sub_i32); in copyPhysReg()
378 BuildMI(MBB, I, DL, get(VE::LEAzii), TmpReg) in copyPhysReg()
386 MIB.getInstr()->addRegisterKilled(TmpReg, TRI, true); in copyPhysReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp331 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
348 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
379 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
407 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
423 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
454 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
479 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
506 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
530 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
628 Register TmpReg = in selectI64Imm() local
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp161 unsigned TmpReg) const;
309 Register TmpReg = RS.FindUnusedReg(&AArch64::GPR64commonRegClass); in instrumentControlFlow() local
312 if (TmpReg != 0) dbgs() << printReg(TmpReg, TRI) << " "; in instrumentControlFlow()
314 if (TmpReg == 0) in instrumentControlFlow()
317 ReturnInstructions.push_back({&MI, TmpReg}); in instrumentControlFlow()
319 CallInstructions.push_back({&MI, TmpReg}); in instrumentControlFlow()
386 unsigned TmpReg) const { in insertRegToSPTaintPropagation()
395 .addDef(TmpReg) in insertRegToSPTaintPropagation()
401 .addDef(TmpReg, RegState::Renamable) in insertRegToSPTaintPropagation()
402 .addUse(TmpReg, RegState::Kill | RegState::Renamable) in insertRegToSPTaintPropagation()
[all …]
H A DAArch64PointerAuth.cpp225 Register AuthenticatedReg, Register TmpReg, bool UseIKey, unsigned BrkImm) { in checkAuthenticatedRegister() argument
240 BuildMI(MBB, MBBI, DL, TII->get(AArch64::LDRWui), getWRegFromXReg(TmpReg)) in checkAuthenticatedRegister()
271 BuildMI(CheckBlock, DL, TII->get(AArch64::EORXrs), TmpReg) in checkAuthenticatedRegister()
276 .addReg(TmpReg) in checkAuthenticatedRegister()
284 BuildMI(CheckBlock, DL, TII->get(AArch64::ORRXrs), TmpReg) in checkAuthenticatedRegister()
290 .addReg(TmpReg) in checkAuthenticatedRegister()
351 Register TmpReg = in checkAuthenticatedLR() local
353 assert(!TI->readsRegister(TmpReg, TRI) && in checkAuthenticatedLR()
356 checkAuthenticatedRegister(TI, Method, AArch64::LR, TmpReg, /*UseIKey=*/true, in checkAuthenticatedLR()
H A DAArch64PointerAuth.h107 Register TmpReg, bool UseIKey,
H A DAArch64FastISel.cpp416 Register TmpReg = createResultReg(RC); in materializeFP() local
423 .addReg(TmpReg, getKillRegState(true)); in materializeFP()
4158 Register TmpReg = MRI.createVirtualRegister(RC); in emitLSL_ri() local
4160 TII.get(AArch64::SUBREG_TO_REG), TmpReg) in emitLSL_ri()
4164 Op0 = TmpReg; in emitLSL_ri()
4274 Register TmpReg = MRI.createVirtualRegister(RC); in emitLSR_ri() local
4276 TII.get(AArch64::SUBREG_TO_REG), TmpReg) in emitLSR_ri()
4280 Op0 = TmpReg; in emitLSR_ri()
4379 Register TmpReg = MRI.createVirtualRegister(RC); in emitASR_ri() local
4381 TII.get(AArch64::SUBREG_TO_REG), TmpReg) in emitASR_ri()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2849 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in loadImmediate()
3066 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, TmpReg, in loadAndAddSymbolAddress()
3462 if (!TmpReg) in expandLoadSingleImmToFPR()
3545 if (!TmpReg) in expandLoadDoubleImmToGPR()
3579 if (!TmpReg) in expandLoadDoubleImmToFPR()
3776 if (!TmpReg) in expandMem16Inst()
3853 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
3855 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
3903 if (!TmpReg) in expandMem9Inst()
4576 if (!TmpReg) in expandUxw()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp86 void emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg,
804 .addReg(DestReg == TmpReg ? DestReg : TmpReg) in emitLAInstSeq()
805 .addReg(DestReg == TmpReg ? DestReg : TmpReg) in emitLAInstSeq()
811 MCInstBuilder(Opc).addReg(TmpReg).addReg(TmpReg).addExpr(LE), in emitLAInstSeq()
817 .addReg(TmpReg) in emitLAInstSeq()
818 .addReg(DestReg == TmpReg ? TmpReg : LoongArch::R0) in emitLAInstSeq()
892 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressPcrelLarge() local
938 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressGotLarge() local
1002 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressTLSIELarge() local
1048 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressTLSLDLarge() local
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp152 Register TmpReg = createResultReg(ToRC); in copyRegToRegClass() local
155 return TmpReg; in copyRegToRegClass()
1025 SrcReg = TmpReg; in PPCMoveToFPReg()
1121 SrcReg = TmpReg; in SelectIToFP()
1448 Arg = TmpReg; in processCallArgs()
1460 Arg = TmpReg; in processCallArgs()
1773 SrcReg = TmpReg; in SelectRet()
1782 SrcReg = TmpReg; in SelectRet()
2026 TmpReg) in PPCMaterializeFP()
2046 .addReg(TmpReg) in PPCMaterializeFP()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp920 Register TmpReg = i < NumInsts - 1 in materializeImm() local
929 Result = MIB.buildInstr(I.getOpcode(), {TmpReg}, {}) in materializeImm()
934 Result = MIB.buildInstr(I.getOpcode(), {TmpReg}, in materializeImm()
938 Result = MIB.buildInstr(I.getOpcode(), {TmpReg}, {SrcReg, SrcReg}); in materializeImm()
949 SrcReg = TmpReg; in materializeImm()
1186 Register TmpReg = DstReg; in selectFPCompare() local
1192 TmpReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectFPCompare()
1208 TmpReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectFPCompare()
1210 MIB.buildInstr(RISCV::OR, {TmpReg}, {Cmp1.getReg(0), Cmp2.getReg(0)}); in selectFPCompare()
1226 TmpReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectFPCompare()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumbRegisterInfo.cpp604 Register TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
608 emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg, in eliminateFrameIndex()
611 emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset); in eliminateFrameIndex()
617 BuildMI(MBB, II, dl, TII.get(ARM::tADDhirr), TmpReg) in eliminateFrameIndex()
618 .addReg(TmpReg) in eliminateFrameIndex()
624 emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII, in eliminateFrameIndex()
629 MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true); in eliminateFrameIndex()
H A DMLxExpansionPass.cpp287 Register TmpReg = in ExpandFPMLxInstruction() local
290 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg) in ExpandFPMLxInstruction()
302 MIB.addReg(TmpReg, getKillRegState(true)) in ExpandFPMLxInstruction()
305 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true)); in ExpandFPMLxInstruction()
H A DThumb1FrameLowering.cpp616 unsigned &TmpReg, MachineRegisterInfo &MRI) { in findTemporariesForLR() argument
617 PopReg = TmpReg = 0; in findTemporariesForLR()
623 TmpReg = 0; in findTemporariesForLR()
628 TmpReg = Reg; in findTemporariesForLR()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp1523 Register TmpReg = MRI->createVirtualRegister(PS->RC); in mergePredStateIntoSP() local
1534 .addReg(TmpReg, RegState::Kill); in mergePredStateIntoSP()
1544 Register TmpReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() local
1549 BuildMI(MBB, InsertPt, Loc, TII->get(TargetOpcode::COPY), TmpReg) in extractPredStateFromSP()
1553 .addReg(TmpReg, RegState::Kill) in extractPredStateFromSP()
1651 Register TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() local
1686 TII->get(Is128Bit ? X86::VPORrr : X86::VPORYrr), TmpReg) in hardenLoadAddr()
1717 auto OrI = BuildMI(MBB, InsertPt, Loc, TII->get(OrOp), TmpReg) in hardenLoadAddr()
1740 BuildMI(MBB, InsertPt, Loc, TII->get(X86::SHRX64rr), TmpReg) in hardenLoadAddr()
1753 AddrRegToHardenedReg[Op->getReg()] = TmpReg; in hardenLoadAddr()
[all …]
H A DX86CmovConversion.cpp775 Register TmpReg = MRI->createVirtualRegister(RC); in convertCmovInstsToBranches() local
780 bool Unfolded = TII->unfoldMemoryOperand(*MBB->getParent(), MI, TmpReg, in convertCmovInstsToBranches()
824 FalseBBRegRewriteTable[NewCMOV->getOperand(0).getReg()] = TmpReg; in convertCmovInstsToBranches()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp319 Register TmpReg = MRI.createVirtualRegister(NewSrcRC); in foldVGPRCopyIntoRegSequence() local
322 TmpReg) in foldVGPRCopyIntoRegSequence()
332 .addReg(TmpReg, RegState::Kill); in foldVGPRCopyIntoRegSequence()
333 TmpReg = TmpAReg; in foldVGPRCopyIntoRegSequence()
336 MI.getOperand(I).setReg(TmpReg); in foldVGPRCopyIntoRegSequence()
880 Register TmpReg = in lowerSpecialCase() local
883 TII->get(AMDGPU::V_READFIRSTLANE_B32), TmpReg) in lowerSpecialCase()
885 MI.getOperand(1).setReg(TmpReg); in lowerSpecialCase()
H A DSILowerI1Copies.cpp691 Register TmpReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in lowerCopiesToI1() local
692 BuildMI(MBB, MI, DL, TII->get(AMDGPU::V_CMP_NE_U32_e64), TmpReg) in lowerCopiesToI1()
695 MI.getOperand(1).setReg(TmpReg); in lowerCopiesToI1()
696 SrcReg = TmpReg; in lowerCopiesToI1()
H A DSIWholeQuadMode.cpp939 Register TmpReg; in lowerKillI1() local
966 TmpReg = MRI->createVirtualRegister(TRI->getBoolRC()); in lowerKillI1()
968 BuildMI(MBB, MI, DL, TII->get(XorOpc), TmpReg).add(Op).addReg(Exec); in lowerKillI1()
971 .addReg(TmpReg); in lowerKillI1()
1032 if (TmpReg) in lowerKillI1()
1033 LIS->createAndComputeVirtRegInterval(TmpReg); in lowerKillI1()
H A DSIRegisterInfo.cpp2348 Register TmpReg = in eliminateFrameIndex() local
2350 FIOp.setReg(TmpReg); in eliminateFrameIndex()
2353 if ((!FrameReg || !Offset) && TmpReg) { in eliminateFrameIndex()
2355 auto MIB = BuildMI(*MBB, MI, DL, TII->get(Opc), TmpReg); in eliminateFrameIndex()
2368 UseSGPR ? TmpReg in eliminateFrameIndex()
2374 if ((!TmpSReg && !FrameReg) || (!TmpReg && !UseSGPR)) in eliminateFrameIndex()
2402 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpReg) in eliminateFrameIndex()
2583 Register TmpReg = RS->scavengeRegisterBackwards(AMDGPU::VGPR_32RegClass, in eliminateFrameIndex() local
2585 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpReg) in eliminateFrameIndex()
2587 FIOp.ChangeToRegister(TmpReg, false, false, true); in eliminateFrameIndex()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp209 Register TmpReg = I->getParent()->getOperand(0).getReg(); in processCandidate() local
210 processDstReg(MRI, TmpReg, DstReg, GVal, false, IsAma); in processCandidate()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h1160 Register TmpReg = MRI.createGenericVirtualRegister(MergeEltTy); in tryCombineUnmergeValues() local
1161 Builder.buildInstr(ConvertOp, {TmpReg}, in tryCombineUnmergeValues()
1163 Builder.buildUnmerge(DstRegs, TmpReg); in tryCombineUnmergeValues()
1519 Register TmpReg = getSrcRegIgnoringCopies(Reg, MRI); in lookThroughCopyInstrs() local
1520 return TmpReg.isValid() ? TmpReg : Reg; in lookThroughCopyInstrs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp353 unsigned TmpReg, SMLoc IDLoc, in emitLoadWithImmOffset() argument
376 emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI); in emitLoadWithImmOffset()
378 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI); in emitLoadWithImmOffset()
380 emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI); in emitLoadWithImmOffset()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp733 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
742 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandCvtFPInt()
747 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc); in expandCvtFPInt()
748 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill); in expandCvtFPInt()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTwoAddressInstructionPass.cpp248 Register TmpReg = FromReg; in isRevCopyChain() local
250 MachineInstr *Def = getSingleDef(TmpReg, MBB); in isRevCopyChain()
254 TmpReg = Def->getOperand(1).getReg(); in isRevCopyChain()
256 if (TmpReg == ToReg) in isRevCopyChain()

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