Searched refs:TheReg (Results 1 – 5 of 5) sorted by relevance
888 auto TheReg =ARMSysReg::lookupMClassSysRegBy12bitSYSmValue(SYSm); in printMSRMaskOperand() local889 if (TheReg && TheReg->isInRequiredFeatures({ARM::FeatureDSP})) { in printMSRMaskOperand()890 O << TheReg->Name; in printMSRMaskOperand()901 if (TheReg) { in printMSRMaskOperand()902 O << TheReg->Name; in printMSRMaskOperand()907 auto TheReg = ARMSysReg::lookupMClassSysRegBy8bitSYSmValue(SYSm); in printMSRMaskOperand() local908 if (TheReg) { in printMSRMaskOperand()909 O << TheReg->Name; in printMSRMaskOperand()962 auto TheReg = ARMBankedReg::lookupBankedRegByEncoding(Banked); in printBankedRegOperand() local963 assert(TheReg && "invalid banked register operand"); in printBankedRegOperand()[all …]
3809 const auto *TheReg = in tryReadRegister() local3811 if (TheReg && TheReg->Readable && in tryReadRegister()3812 TheReg->haveFeatures(Subtarget->getFeatureBits())) in tryReadRegister()3813 Imm = TheReg->Encoding; in tryReadRegister()3900 auto TheReg = AArch64SysReg::lookupSysRegByName(RegString->getString()); in tryWriteRegister() local3901 if (TheReg && TheReg->Writeable && in tryWriteRegister()3902 TheReg->haveFeatures(Subtarget->getFeatureBits())) in tryWriteRegister()3903 Imm = TheReg->Encoding; in tryWriteRegister()
5398 auto TheReg = ARMBankedReg::lookupBankedRegByName(RegString.lower()); in getBankedRegisterMask() local5399 if (!TheReg) in getBankedRegisterMask()5401 return TheReg->Encoding; in getBankedRegisterMask()5421 auto TheReg = ARMSysReg::lookupMClassSysRegByName(Reg); in getMClassRegisterMask() local5423 if (!TheReg || !TheReg->hasRequiredFeatures(FeatureBits)) in getMClassRegisterMask()5425 return (int)(TheReg->Encoding & 0xFFF); // SYSm value in getMClassRegisterMask()
5077 auto TheReg = ARMSysReg::lookupMClassSysRegByName(Mask.lower()); in parseMSRMaskOperand() local5078 if (!TheReg || !TheReg->hasRequiredFeatures(getSTI().getFeatureBits())) in parseMSRMaskOperand()5081 unsigned SYSmvalue = TheReg->Encoding & 0xFFF; in parseMSRMaskOperand()5161 auto TheReg = ARMBankedReg::lookupBankedRegByName(RegName.lower()); in parseBankedRegOperand() local5162 if (!TheReg) in parseBankedRegOperand()5164 unsigned Encoding = TheReg->Encoding; in parseBankedRegOperand()
1054 unsigned TheReg = Regs[Reg++]; in AddInlineAsmOperands() local1055 Ops.push_back(DAG.getRegister(TheReg, RegisterVT)); in AddInlineAsmOperands()