| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 426 DestReg = TempReg; in materializeGV()
1611 emitInst(Mips::OR, TempReg[2]).addReg(TempReg[0]).addReg(TempReg[1]); in fastLowerIntrinsicCall()
1633 emitInst(Mips::ANDi, TempReg[2]).addReg(TempReg[0]).addImm(0xFF00); in fastLowerIntrinsicCall()
1634 emitInst(Mips::OR, TempReg[3]).addReg(TempReg[1]).addReg(TempReg[2]); in fastLowerIntrinsicCall()
1637 emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8); in fastLowerIntrinsicCall()
1640 emitInst(Mips::OR, TempReg[7]).addReg(TempReg[3]).addReg(TempReg[5]); in fastLowerIntrinsicCall()
1641 emitInst(Mips::OR, DestReg).addReg(TempReg[6]).addReg(TempReg[7]); in fastLowerIntrinsicCall()
1972 if (!TempReg) in selectShift()
1980 Op0Reg = TempReg; in selectShift()
2100 VReg = TempReg; in getRegEnsuringSimpleIntegerWidening()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 691 SingleScratchReg = ScratchReg == TempReg; in emitPrologue()
809 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
875 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
921 .addDef(TempReg) in emitPrologue()
955 .addReg(TempReg, RegState::Kill); in emitPrologue()
1290 Register &TempReg) { in inlineStackProbe() argument
1299 .addReg(TempReg) in inlineStackProbe()
1360 Register &FinalStackPtr = TempReg; in inlineStackProbe()
1612 SingleScratchReg = ScratchReg == TempReg; in emitEpilogue()
1783 BuildMI(MBB, MBBI, dl, LoadWordInst, TempReg) in emitEpilogue()
[all …]
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| H A D | PPCISelDAGToDAG.cpp | 479 Register TempReg = RegInfo->createVirtualRegister(&PPC::GPRCRegClass); in INITIALIZE_PASS() local
482 .addReg(TempReg, RegState::Define).addReg(GlobalBaseReg); in INITIALIZE_PASS()
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| H A D | PPCISelLowering.cpp | 12582 Register TempReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca() local
12583 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::LIS8 : PPC::LIS), TempReg) in emitProbedAlloca()
12587 .addReg(TempReg) in emitProbedAlloca()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetMachine.cpp | 1527 Register TempReg; in parseMachineFunctionInfo() local
1528 if (parseNamedRegisterReference(PFS, TempReg, RegName.Value, Error)) { in parseMachineFunctionInfo()
1532 RegVal = TempReg; in parseMachineFunctionInfo()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 891 unsigned TempReg = AddrReg == X86::R10 ? X86::R11D : X86::R10D; in LowerKCFI_CHECK() local
893 MCInstBuilder(X86::MOV32ri).addReg(TempReg).addImm(-MaskKCFIType(Type))); in LowerKCFI_CHECK()
896 .addReg(TempReg) in LowerKCFI_CHECK()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1801 Register TempReg = MI.getOperand(1).getReg(); in ExpandCMP_SWAP() local
1865 MIB = BuildMI(StoreBB, DL, TII->get(StrexOp), TempReg) in ExpandCMP_SWAP()
1875 .addReg(TempReg, RegState::Kill) in ExpandCMP_SWAP()
1931 Register TempReg = MI.getOperand(1).getReg(); in ExpandCMP_SWAP_64() local
1989 MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg); in ExpandCMP_SWAP_64()
1996 .addReg(TempReg, RegState::Kill) in ExpandCMP_SWAP_64()
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| H A D | ARMFastISel.cpp | 2973 Register TempReg = MF->getRegInfo().createVirtualRegister(&ARM::rGPRRegClass); in ARMLowerPICELF() local
2976 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), TempReg) in ARMLowerPICELF()
2989 .addReg(TempReg) in ARMLowerPICELF()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 3390 unsigned TempReg = Inst.getOperand(1).getReg(); in validateInstruction() local
3391 if (DestReg == TempReg) { in validateInstruction()
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 394 const TreePatternNode *Src, unsigned TempReg);
|