Searched refs:TSchedModel (Results 1 – 7 of 7) sorted by relevance
78 TargetSchedModel TSchedModel; member in __anon9511fe0e0111::MachineCombiner237 LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx, in getDepth()246 LatencyOp = TSchedModel.computeOperandLatency( in getDepth()285 LatencyOp = TSchedModel.computeOperandLatency( in getLatency()289 LatencyOp = TSchedModel.computeInstrLatency(NewRoot); in getLatency()342 NewRootLatency += TSchedModel.computeInstrLatency(InsInstrs[i]); in getLatenciesForInstrSequences()347 RootLatency += TSchedModel.computeInstrLatency(I); in getLatenciesForInstrSequences()408 NewRootLatency = TSchedModel.computeInstrLatency(InsInstrs.back()); in improvesCriticalPathLen()409 RootLatency = TSchedModel.computeInstrLatency(Root); in improvesCriticalPathLen()448 if (!TSchedModel.hasInstrSchedModel()) in preservesResourceLen()[all …]
110 TargetSchedModel TSchedModel; member in __anonf7d98fdb0111::SelectOptimizeImpl412 TSchedModel.init(TSI); in run()440 TSchedModel.init(TSI); in runOnFunction()1211 uint64_t MispredictPenalty = TSchedModel.getMCSchedModel()->MispredictPenalty; in getMispredictionCost()
125 TargetSchedModel TSchedModel; member in __anon7d8d05d20111::X86CmovConverterPass184 TSchedModel.init(&STI); in runOnMachineFunction()483 unsigned Latency = TSchedModel.computeInstrLatency(&MI); in checkForProfitableCmovCandidates()548 unsigned MispredictPenalty = TSchedModel.getMCSchedModel()->MispredictPenalty; in checkForProfitableCmovCandidates()
63 TSchedModel.init(&ST); in GCNHazardRecognizer()274 const MCSchedClassDesc *SC = TSchedModel.resolveSchedClass(&MI); in getMFMAPipelineWaitStates()275 assert(TSchedModel.getWriteProcResBegin(SC) != in getMFMAPipelineWaitStates()276 TSchedModel.getWriteProcResEnd(SC)); in getMFMAPipelineWaitStates()277 return TSchedModel.getWriteProcResBegin(SC)->ReleaseAtCycle; in getMFMAPipelineWaitStates()2256 TSchedModel.computeInstrLatency(MI1) == 2) in checkMAIHazards90A()2275 switch (TSchedModel.computeInstrLatency(MI1)) { in checkMAIHazards90A()2325 switch (TSchedModel.computeInstrLatency(MI1)) { in checkMAIHazards90A()2639 switch (TSchedModel.computeInstrLatency(MFMA)) { in checkMAIVALUHazards()2705 unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()[all …]
49 TargetSchedModel TSchedModel; variable
955 const TargetSchedModel *TSchedModel = DAGInstrs->getSchedModel(); in apply() local956 if (!TSchedModel || DAG->SUnits.empty()) in apply()973 unsigned Lat = TSchedModel->computeInstrLatency(&MAI) - 1; in apply()
1601 const TargetSchedModel *TSchedModel = DAGInstrs->getSchedModel(); in apply() local1602 if (!TSchedModel || DAGInstrs->SUnits.empty()) in apply()