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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrKL.td22 [(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8, XS;
27 "encodekey128\t{$src, $dst|$dst, $src}", []>, T8, XS;
32 "encodekey256\t{$src, $dst|$dst, $src}", []>, T8, XS;
40 (X86aesenc128kl VR128:$src1, addr:$src2))]>, T8, XS;
45 (X86aesdec128kl VR128:$src1, addr:$src2))]>, T8, XS;
50 (X86aesenc256kl VR128:$src1, addr:$src2))]>, T8, XS;
55 (X86aesdec256kl VR128:$src1, addr:$src2))]>, T8, XS;
65 "aesencwide128kl\t$src", []>, T8, XS;
67 "aesdecwide128kl\t$src", []>, T8, XS;
69 "aesencwide256kl\t$src", []>, T8, XS;
[all …]
H A DX86InstrAMX.td24 T8, PS;
29 T8, PD;
34 T8, XD;
39 T8, PD;
44 T8, XS;
58 VEX, T8, XD;
104 VEX, VVVV, T8, XD;
108 VEX, VVVV, T8, XS;
112 VEX, VVVV, T8, PD;
116 VEX, VVVV, T8;
[all …]
H A DX86InstrRAOINT.td42 defm AADD : RAOINT_BASE<"add">, T8;
43 defm AAND : RAOINT_BASE<"and">, T8, PD;
44 defm AOR : RAOINT_BASE<"or" >, T8, XD;
45 defm AXOR : RAOINT_BASE<"xor">, T8, XS;
H A DX86InstrVMX.td20 "invept\t{$src2, $src1|$src1, $src2}", []>, T8, PD,
23 "invept\t{$src2, $src1|$src1, $src2}", []>, T8, PD,
31 "invvpid\t{$src2, $src1|$src1, $src2}", []>, T8, PD,
34 "invvpid\t{$src2, $src1|$src1, $src2}", []>, T8, PD,
H A DX86InstrUtils.td28 class T8 { Map OpMap = T8; }
682 // SS38I - SSSE3 instructions with T8 prefix.
710 // SS48I - SSE 4.1 instructions with T8 prefix.
724 // SS428I - SSE 4.2 instructions with T8 prefix.
739 // AVX8I - AVX instructions with T8, PD prefix.
753 // AVX28I - AVX2 instructions with T8, PD prefix.
781 class AVX5128IBase : T8, PD {
834 : I<o, F, outs, ins, asm, pattern>, T8, PD,
863 : I<o, F, outs, ins, asm, pattern>, T8, PD,
867 : I<o, F, outs, ins, asm, pattern>, T8, PD,
[all …]
H A DX86InstrMisc.td1098 OpSize16, T8;
1102 OpSize32, T8;
1106 T8;
1112 OpSize16, T8;
1116 OpSize32, T8;
1120 T8;
1298 t.RegClass:$src2))]>, T8;
1383 T8, VVVV, Sched<[WriteALU]>;
1501 T8, Requires<[HasMOVDIRI, NoEGPR]>;
1674 VEX, VVVV, T8, PD, Sched<[WriteXCHG]>;
[all …]
H A DX86InstrFMA3Info.cpp149 (TSFlags & X86II::OpMapMask) == X86II::T8) || in getFMA3Group()
151 ((TSFlags & X86II::OpMapMask) == X86II::T8 || in getFMA3Group()
H A DX86InstrSystem.td442 [(set GR64:$dst, (int_x86_urdmsr GR64:$src))]>, T8, XD;
450 [(int_x86_uwrmsr GR64:$src1, GR64:$src2)]>, T8, XS;
526 [(int_x86_wrssd GR32:$src, addr:$dst)]>, T8;
529 [(int_x86_wrssq GR64:$src, addr:$dst)]>, T8;
532 [(int_x86_wrussd GR32:$src, addr:$dst)]>, T8, PD;
535 [(int_x86_wrussq GR64:$src, addr:$dst)]>, T8, PD;
694 [(int_x86_invpcid GR32:$src1, addr:$src2)]>, T8, PD,
697 "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8, PD,
H A DX86InstrAVX512.td1091 DestInfo.ExeDomain>, T8, PD, EVEX,
2108 T8, REX_W, EVEX_CD8<64, CD8VF>;
2124 T8, REX_W, EVEX_CD8<64, CD8VF>;
6361 T8, PD, EVEX, VVVV, Sched<[sched]>;
7176 T8, PD, EVEX, VVVV, Sched<[sched]>;
8898 T8, PD, Sched<[sched]>;
9134 T8, PD;
9137 T8, PD;
12195 T8, PD, EVEX, VVVV, Sched<[sched]>;
12201 T8, PD, EVEX, VVVV,
[all …]
H A DX86InstrArithmetic.td1325 T8, DefEFLAGS;
1330 T8, DefEFLAGS;
1371 (ins t.RegClass:$src), "mulx", mulx_args, []>, T8, XD, VEX,
1410 def ADCX32rr : BinOpRRF_RF<0xF6, "adcx", Xi32>, T8, PD;
1411 def ADCX64rr : BinOpRRF_RF<0xF6, "adcx", Xi64>, T8, PD;
1412 def ADOX32rr : BinOpRRF_RF<0xF6, "adox", Xi32>, T8, XS;
1413 def ADOX64rr : BinOpRRF_RF<0xF6, "adox", Xi64>, T8, XS;
1426 def ADCX32rm : BinOpRMF_RF<0xF6, "adcx", Xi32>, T8, PD;
1427 def ADCX64rm : BinOpRMF_RF<0xF6, "adcx", Xi64>, T8, PD;
1428 def ADOX32rm : BinOpRMF_RF<0xF6, "adox", Xi32>, T8, XS;
[all …]
/freebsd-14.2/contrib/googletest/googletest/test/
H A Dgtest_test_macro_stack_footprint_test.cc50 TEST(test_case_name, T8) {} \
/freebsd-14.2/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c207 xmmi T0, T1, T2, T3, T4, T5, T6, T7, T8; in poly1305_blocks() local
402 T8 = _mm_unpackhi_epi32(T5, T6); in poly1305_blocks()
405 M7 = _mm_unpacklo_epi32(T8, _mm_setzero_si128()); in poly1305_blocks()
406 M8 = _mm_unpackhi_epi32(T8, _mm_setzero_si128()); in poly1305_blocks()
627 T8 = _mm_unpackhi_epi32(T5, T6); in poly1305_blocks()
630 M2 = _mm_unpacklo_epi32(T8, _mm_setzero_si128()); in poly1305_blocks()
631 M3 = _mm_unpackhi_epi32(T8, _mm_setzero_si128()); in poly1305_blocks()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.td116 // Implicit use of T8
642 let Uses = [T8];
646 let Uses = [T8];
670 let Uses = [T8];
674 let Uses = [T8];
696 let Defs = [T8];
705 let Defs = [T8];
714 let Defs = [T8];
1174 let Defs = [T8];
1184 let Defs = [T8];
[all …]
H A DMipsRegisterInfo.td112 def T8 : MipsGPRReg< 24, "24">, DwarfRegNum<[24]>;
147 def T8_64 : Mips64GPRReg< 24, "24", [T8]>, DwarfRegNum<[24]>;
294 T8, T9,
314 T8, T9,
H A DMipsCallingConv.td271 CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3, T4, T5, T6, T7, T8, V1]>>>,
273 // In NaCl, T6, T7 and T8 are reserved and not available as argument
276 // accesses (loads and stores). T8 contains the thread pointer.
/freebsd-14.2/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8192-asurada-hayato-r1.dts23 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
H A Dmt8192-asurada-spherion-r0.dts41 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
/freebsd-14.2/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7180-trogdor-pazquel360.dtsi46 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
H A Dsc7180-trogdor-pazquel.dtsi59 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
H A Dsc7180-trogdor-kingoftown.dts59 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
H A Dsc7180-trogdor-kingoftown.dtsi51 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
H A Dsc7180-trogdor-pompom.dtsi121 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp259 return Reg != Mips::SP && Reg != Mips::T8; in baseRegNeedsLoadStoreMask()
/freebsd-14.2/sys/contrib/device-tree/src/arm/
H A Dgemini-nas4220b.dts118 pins = "T8 GMAC0 TXEN", "W11 GMAC1 TXEN";
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.h159 T8 = 2, enumerator

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