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Searched refs:SubVecLMUL (Results 1 – 2 of 2) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp2020 RISCVII::VLMUL SubVecLMUL = RISCVTargetLowering::getLMUL(SubVecContainerVT); in Select() local
2021 bool IsSubVecPartReg = SubVecLMUL == RISCVII::VLMUL::LMUL_F2 || in Select()
2022 SubVecLMUL == RISCVII::VLMUL::LMUL_F4 || in Select()
2023 SubVecLMUL == RISCVII::VLMUL::LMUL_F8; in Select()
H A DRISCVISelLowering.cpp9449 RISCVII::VLMUL SubVecLMUL = RISCVTargetLowering::getLMUL(SubVecVT); in lowerINSERT_SUBVECTOR() local
9450 bool IsSubVecPartReg = SubVecLMUL == RISCVII::VLMUL::LMUL_F2 || in lowerINSERT_SUBVECTOR()
9451 SubVecLMUL == RISCVII::VLMUL::LMUL_F4 || in lowerINSERT_SUBVECTOR()
9452 SubVecLMUL == RISCVII::VLMUL::LMUL_F8; in lowerINSERT_SUBVECTOR()