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Searched refs:SubVT (Results 1 – 11 of 11) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp3298 EVT SubVT = N->getValueType(0); in SplitVecOp_EXTRACT_SUBVECTOR() local
3312 } else if (SubVT.isScalableVector() == in SplitVecOp_EXTRACT_SUBVECTOR()
3314 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi, in SplitVecOp_EXTRACT_SUBVECTOR()
3319 assert(SubVT.isFixedLengthVector() && in SplitVecOp_EXTRACT_SUBVECTOR()
3326 if (SubVT.getScalarType() == MVT::i1) in SplitVecOp_EXTRACT_SUBVECTOR()
3348 SubVT, dl, Store, StackPtr, in SplitVecOp_EXTRACT_SUBVECTOR()
5663 EVT SubVT = Mask->getValueType(0); in convertMask() local
6421 EVT SubVT = SubVec.getValueType(); in WidenVecOp_INSERT_SUBVECTOR() local
6427 if (VT.knownBitsGE(SubVT)) in WidenVecOp_INSERT_SUBVECTOR()
6429 else if (VT.isScalableVector() && SubVT.isFixedLengthVector()) { in WidenVecOp_INSERT_SUBVECTOR()
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H A DDAGCombiner.cpp3749 EVT SubVT = N->getValueType(0); in foldSubToUSubSat() local
23540 EVT SubVT; in combineConcatVectorOfConcatVectors() local
23548 SubVT = Op.getOperand(0).getValueType(); in combineConcatVectorOfConcatVectors()
23554 if (SubVT != Op.getOperand(0).getValueType()) in combineConcatVectorOfConcatVectors()
24014 V.getOperand(0).getValueType() == SubVT && in getSubVectorSrc()
24037 EVT SubVT = Extract->getValueType(0); in narrowInsertExtractVectorBinOp() local
24041 SDValue Sub0 = getSubVectorSrc(Bop0, Index, SubVT); in narrowInsertExtractVectorBinOp()
24042 SDValue Sub1 = getSubVectorSrc(Bop1, Index, SubVT); in narrowInsertExtractVectorBinOp()
25583 EVT SubVT = RHS.getOperand(0).getValueType(); in visitVECTOR_SHUFFLE() local
25585 int NumSubElts = SubVT.getVectorNumElements(); in visitVECTOR_SHUFFLE()
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H A DSelectionDAG.cpp3254 EVT SubVT = N0.getValueType(); in computeKnownBits() local
3255 unsigned SubBitWidth = SubVT.getScalarSizeInBits(); in computeKnownBits()
3258 if (!(SubVT.isInteger() || SubVT.isFloatingPoint())) in computeKnownBits()
11971 EVT SubVT = EVT::getVectorVT(*getContext(), OpSVT, NumSubElts); in matchBinOpReduction() local
11972 if (!TLI->isExtractSubvectorCheap(SubVT, OpVT, 0)) in matchBinOpReduction()
11975 return getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(Op), SubVT, Op, in matchBinOpReduction()
H A DTargetLowering.cpp1309 EVT SubVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local
1311 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedBits()
3221 EVT SubVT = Op.getOperand(0).getValueType(); in SimplifyDemandedVectorElts() local
3223 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedVectorElts()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1072 MVT SubVT = MVT::getVectorVT(MaxVT.getScalarType(), NumSubElts); in PreprocessISelDAG() local
1073 SDValue Extract = CurDAG->getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, in PreprocessISelDAG()
4274 EVT SubVT = ShiftAmt.getValueType(); in tryShiftAmountMod() local
4284 SubVT = Add1.getValueType(); in tryShiftAmountMod()
4286 if (Add0.getValueType() != SubVT) { in tryShiftAmountMod()
4287 Add0 = CurDAG->getZExtOrTrunc(Add0, DL, SubVT); in tryShiftAmountMod()
4291 X = CurDAG->getNode(ISD::ADD, DL, SubVT, Add1, Add0); in tryShiftAmountMod()
4298 SDValue Zero = CurDAG->getConstant(0, DL, SubVT); in tryShiftAmountMod()
4299 SDValue Neg = CurDAG->getNode(ISD::SUB, DL, SubVT, Zero, X); in tryShiftAmountMod()
H A DX86ISelLowering.cpp3936 EVT SubVT = Sub.getValueType(); in collectConcatOps() local
3943 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps()
3963 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps()
4355 EVT SubVT = V1.getValueType(); in concatSubVectors() local
4356 EVT SubSVT = SubVT.getScalarType(); in concatSubVectors()
5777 EVT SubVT = Sub.getValueType(); in getFauxShuffleMask() local
5820 return SubVT.getFixedSizeInBits() < in getFauxShuffleMask()
40176 In = DAG.getBitcast(SubVT, In); in combineTargetShuffle()
40327 SubLo = DAG.getBitcast(SubVT, SubLo); in combineTargetShuffle()
40328 SubHi = DAG.getBitcast(SubVT, SubHi); in combineTargetShuffle()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp3631 EVT SubVT = ShiftAmt->getValueType(0); in tryShiftAmountMod() local
3632 if (SubVT == MVT::i32) { in tryShiftAmountMod()
3636 assert(SubVT == MVT::i64); in tryShiftAmountMod()
3641 CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, ZeroReg, SubVT); in tryShiftAmountMod()
3643 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
3651 EVT SubVT = ShiftAmt->getValueType(0); in tryShiftAmountMod() local
3652 if (SubVT == MVT::i32) { in tryShiftAmountMod()
3656 assert(SubVT == MVT::i64); in tryShiftAmountMod()
3661 CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, ZeroReg, SubVT); in tryShiftAmountMod()
3663 CurDAG->getMachineNode(NotOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
H A DAArch64ISelLowering.cpp13313 EVT SubVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerBUILD_VECTOR() local
13314 if (isTypeLegal(SubVT) && SubVT.isVector() && in LowerBUILD_VECTOR()
13315 SubVT.getVectorNumElements() >= 2) { in LowerBUILD_VECTOR()
13319 LowerBUILD_VECTOR(DAG.getBuildVector(SubVT, dl, Ops1), DAG); in LowerBUILD_VECTOR()
13429 EVT SubVT = V1.getValueType(); in LowerCONCAT_VECTORS() local
18398 EVT SubVT = SubVec.getValueType(); in performInsertSubvectorCombine() local
18403 !DAG.getTargetLoweringInfo().isTypeLegal(SubVT)) in performInsertSubvectorCombine()
18411 unsigned NumSubElts = SubVT.getVectorNumElements(); in performInsertSubvectorCombine()
18412 if ((SubVT.getSizeInBits() * 2) != VecVT.getSizeInBits() || in performInsertSubvectorCombine()
18422 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec, in performInsertSubvectorCombine()
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1393 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts); variable
1468 SubVT, DemandedAllSubElts,
1489 SubVT, DemandedAllSubElts,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8911 EVT SubVT = SubV1.getValueType(); in LowerVECTOR_SHUFFLE() local
8919 ShuffleMask, SubVT, WhichResult, isV_UNDEF)) { in LowerVECTOR_SHUFFLE()
8924 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE()
9256 EVT SubVT = MVT::v4i32; in LowerEXTRACT_SUBVECTOR() local
9257 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9271 EVT SubVT = MVT::getVectorVT(ElType, NumElts); in LowerEXTRACT_SUBVECTOR() local
9272 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
15642 EVT SubVT = SubVec.getValueType(); in PerformInsertSubvectorCombine() local
15647 !DCI.DAG.getTargetLoweringInfo().isTypeLegal(SubVT)) in PerformInsertSubvectorCombine()
15655 unsigned NumSubElts = SubVT.getVectorNumElements(); in PerformInsertSubvectorCombine()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp2691 auto *SubVT = VectorType::get(ScalarTy, VF); in vectorizeInterleaveGroup() local
2711 Value *Undef = PoisonValue::get(SubVT); in vectorizeInterleaveGroup()
2724 if (StoredVec->getType() != SubVT) in vectorizeInterleaveGroup()
2725 StoredVec = createBitOrPointerCast(StoredVec, SubVT, DL); in vectorizeInterleaveGroup()