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Searched refs:Sub0 (Results 1 – 6 of 6) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp246 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in tryInlineAsm() local
250 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp211 SDValue Sub0 = in selectInlineAsm() local
216 CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, RegCopy.getValue(1)); in selectInlineAsm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp830 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32); in SelectADD_SUB_I64() local
834 DL, MVT::i32, LHS, Sub0); in SelectADD_SUB_I64()
839 DL, MVT::i32, RHS, Sub0); in SelectADD_SUB_I64()
872 Sub0, in SelectADD_SUB_I64()
1030 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32); in SelectMUL_LOHI() local
1032 MVT::i32, SDValue(Mad, 0), Sub0); in SelectMUL_LOHI()
1672 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32); in SelectFlatOffsetImpl() local
1676 DL, MVT::i32, N0, Sub0); in SelectFlatOffsetImpl()
1695 SDValue(Add, 0), Sub0, SDValue(Addc, 0), Sub1}; in SelectFlatOffsetImpl()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.cpp434 const MCInst *Sub0 = MI.getOperand(0).getInst(); in encodeSingleInstruction() local
438 unsigned SubBits0 = getBinaryCodeForInstr(*Sub0, Fixups, STI); in encodeSingleInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2241 unsigned Sub0 = (is64BitVector ? ARM::dsub_0 : ARM::qsub_0); in SelectVLD() local
2244 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2524 unsigned Sub0 = is64BitVector ? ARM::dsub_0 : ARM::qsub_0; in SelectVLDSTLane() local
2527 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
5799 SDValue Sub0 = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32, in tryInlineAsm() local
5803 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp24041 SDValue Sub0 = getSubVectorSrc(Bop0, Index, SubVT); in narrowInsertExtractVectorBinOp() local
24047 if (!Sub0 || !Sub1) in narrowInsertExtractVectorBinOp()
24053 return DAG.getNode(BinOpcode, SDLoc(Extract), SubVT, Sub0, Sub1, in narrowInsertExtractVectorBinOp()