Searched refs:StVal (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 6486 SDValue StVal = ST->getValue(); in WidenVecOp_STORE() local
6487 EVT StVT = StVal.getValueType(); in WidenVecOp_STORE()
6496 StVal = GetWidenedVector(StVal); in WidenVecOp_STORE()
6522 SDValue StVal = ST->getValue(); in WidenVecOp_VP_STORE() local
6527 StVal = GetWidenedVector(StVal); in WidenVecOp_VP_STORE()
6543 StVal = GetWidenedVector(StVal); in WidenVecOp_VP_STORE()
6562 SDValue StVal = SST->getValue(); in WidenVecOp_VP_STRIDED_STORE() local
6574 StVal = GetWidenedVector(StVal); in WidenVecOp_VP_STRIDED_STORE()
6594 SDValue StVal = MST->getValue(); in WidenVecOp_MSTORE() local
6599 StVal = GetWidenedVector(StVal); in WidenVecOp_MSTORE()
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 1869 SDValue StVal = OutVals[OIdx]; in LowerCall() local
1875 if (PromoteScalarIntegerPTX(StVal.getValueType(), &PromotedVT)) { in LowerCall()
1878 StVal = DAG.getNode(Ext, dl, PromotedVT, StVal); in LowerCall()
1883 SDValue srcAddr = DAG.getNode(ISD::ADD, dl, PtrVT, StVal, in LowerCall()
1885 StVal = DAG.getLoad(EltVT, dl, TempChain, srcAddr, MachinePointerInfo(), in LowerCall()
1890 StVal = DAG.getNode(Outs[OIdx].Flags.isSExt() ? ISD::SIGN_EXTEND in LowerCall()
1892 dl, MVT::i32, StVal); in LowerCall()
1898 StVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, StVal); in LowerCall()
1902 StoreOperands.push_back(StVal); in LowerCall()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16048 SDValue &StVal = Ops[Ops.size() - 2]; in TryCombineBaseUpdate() local
16049 StVal = DAG.getNode(ISD::BITCAST, dl, AlignedVecTy, StVal); in TryCombineBaseUpdate()
16541 SDValue StVal = St->getValue(); in PerformTruncatingStoreCombine() local
16542 EVT VT = StVal.getValueType(); in PerformTruncatingStoreCombine()
16799 SDValue StVal = St->getValue(); in PerformSTORECombine() local
16800 EVT VT = StVal.getValueType(); in PerformSTORECombine()
16821 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
16822 StVal.getNode()->hasOneUse()) { in PerformSTORECombine()
16841 if (StVal.getValueType() == MVT::i64 && in PerformSTORECombine()
16847 SDLoc dl(StVal); in PerformSTORECombine()
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 20568 SDValue StVal = St.getValue(); in replaceZeroVectorStore() local
20569 EVT VT = StVal.getValueType(); in replaceZeroVectorStore()
20584 if (StVal.getOpcode() != ISD::BUILD_VECTOR) in replaceZeroVectorStore()
20590 if (!StVal.hasOneUse()) in replaceZeroVectorStore()
20607 SDValue EltVal = StVal.getOperand(I); in replaceZeroVectorStore()
20635 SDValue StVal = St.getValue(); in replaceSplatVectorStore() local
20636 EVT VT = StVal.getValueType(); in replaceSplatVectorStore()
20665 SplatVal = StVal.getOperand(1); in replaceSplatVectorStore()
20678 StVal = StVal.getOperand(0); in replaceSplatVectorStore()
20695 SDValue StVal = S->getValue(); in splitStores() local
[all …]
|