Searched refs:SrcOps (Results 1 – 8 of 8) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.cpp | 117 profileSrcOps(SrcOps, B); in profileEverything() 196 assert(SrcOps.size() == 2 && "Invalid sources"); in buildInstr() 198 LLT SrcTy = SrcOps[0].getLLTTy(*getMRI()); in buildInstr() 207 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI()); in buildInstr() 214 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr() 231 assert(SrcOps.size() == 2 && "Invalid sources"); in buildInstr() 234 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr() 240 assert(SrcOps.size() == 2 && "Invalid src ops"); in buildInstr() 242 const SrcOp &Src0 = SrcOps[0]; in buildInstr() 243 const SrcOp &Src1 = SrcOps[1]; in buildInstr() [all …]
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| H A D | MachineIRBuilder.cpp | 1128 SrcOps[1].getLLTTy(*getMRI()), SrcOps[2].getLLTTy(*getMRI())); in buildInstr() 1218 assert(SrcOps[1].getLLTTy(*getMRI()) == SrcOps[2].getLLTTy(*getMRI()) && in buildInstr() 1249 assert(llvm::all_of(SrcOps, in buildInstr() 1255 assert((TypeSize::ScalarTy)SrcOps.size() * in buildInstr() 1291 assert((!SrcOps.empty() || SrcOps.size() < 2) && in buildInstr() 1296 assert(llvm::all_of(SrcOps, in buildInstr() 1309 assert((!SrcOps.empty() || SrcOps.size() < 2) && in buildInstr() 1314 assert(llvm::all_of(SrcOps, in buildInstr() 1324 assert((!SrcOps.empty() || SrcOps.size() < 2) && in buildInstr() 1326 assert(llvm::all_of(SrcOps, in buildInstr() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.h | 73 ArrayRef<SrcOp> SrcOps, std::optional<unsigned> Flags, 95 buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps,
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| H A D | MachineIRBuilder.h | 225 unsigned getOpcodeForMerge(const DstOp &DstOp, ArrayRef<SrcOp> SrcOps) const; 2097 buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 72 SmallVector<SrcOp, 2> SrcOps; ///< Source registers. member 74 std::initializer_list<SrcOp> SrcOps) in ShuffleVectorPseudo() 75 : Opc(Opc), Dst(Dst), SrcOps(SrcOps){}; in ShuffleVectorPseudo() 450 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, MatchInfo.SrcOps); in applyShuffleVectorPseudo() 459 if (MatchInfo.SrcOps[2].getImm() == 0) in applyEXT() 460 MIRBuilder.buildCopy(MatchInfo.Dst, MatchInfo.SrcOps[0]); in applyEXT() 464 MIRBuilder.buildConstant(LLT::scalar(32), MatchInfo.SrcOps[2].getImm()); in applyEXT() 466 {MatchInfo.SrcOps[0], MatchInfo.SrcOps[1], Cst}); in applyEXT()
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| H A D | AArch64InstructionSelector.cpp | 260 std::initializer_list<llvm::SrcOp> SrcOps, 4404 std::initializer_list<llvm::SrcOp> SrcOps, MachineIRBuilder &MIRBuilder, in emitInstr() argument 4409 auto MI = MIRBuilder.buildInstr(Opcode, DstOps, SrcOps); in emitInstr()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4161 for (SDValue &Op : SrcOps) { in getAVX512Node() 22087 SrcOps.push_back(Src); in matchScalarReduction() 22099 for (SDValue &SrcOp : SrcOps) in matchScalarReduction() 38967 SDValue Op = SrcOps[SrcOpIndex]; in combineX86ShufflesRecursively() 39080 Ops.append(SrcOps.begin(), SrcOps.end()); in combineX86ShufflesRecursively() 48576 SmallVector<SDValue, 2> SrcOps; in combineAnd() local 48579 SrcOps.size() == 1) { in combineAnd() 49371 SmallVector<SDValue, 2> SrcOps; in combineOr() local 49374 SrcOps.size() == 1) { in combineOr() 50738 N0 = !SrcOps.empty() ? SrcOps[0] : SDValue(); in isHorizontalBinOp() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 23672 SmallVector<SDValue, 4> SrcOps; in combineConcatVectorOfCasts() local 23677 SrcOps.push_back(Op.getOperand(0)); in combineConcatVectorOfCasts() 23707 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, DL, ConcatSrcVT, SrcOps); in combineConcatVectorOfCasts()
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