| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 853 Value *Sqrt = Builder.CreateCall(getSqrtF32(), Scaled); in emitSqrtIEEE2ULP() local 857 return Builder.CreateCall(getLdexpF32(), {Sqrt, OutputScaleFactor}); in emitSqrtIEEE2ULP() 2120 bool AMDGPUCodeGenPrepareImpl::visitSqrt(IntrinsicInst &Sqrt) { in visitSqrt() argument 2121 Type *Ty = Sqrt.getType()->getScalarType(); in visitSqrt() 2125 const FPMathOperator *FPOp = cast<const FPMathOperator>(&Sqrt); in visitSqrt() 2151 Value *SrcVal = Sqrt.getOperand(0); in visitSqrt() 2152 bool CanTreatAsDAZ = canIgnoreDenormalInput(SrcVal, &Sqrt); in visitSqrt() 2159 IRBuilder<> Builder(&Sqrt); in visitSqrt() 2172 NewSqrt->takeName(&Sqrt); in visitSqrt() 2173 Sqrt.replaceAllUsesWith(NewSqrt); in visitSqrt() [all …]
|
| H A D | SIISelLowering.cpp | 10782 SDValue Sqrt = in lowerFSQRTF16() local 10785 return DAG.getNode(ISD::FP_ROUND, SL, MVT::f16, Sqrt, in lowerFSQRTF16()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyLibCalls.cpp | 2175 if (!Sqrt) in replacePowWithSqrt() 2181 Sqrt = B.CreateCall(FAbsFn, Sqrt, "abs"); in replacePowWithSqrt() 2184 Sqrt = copyFlags(*Pow, Sqrt); in replacePowWithSqrt() 2192 Sqrt = B.CreateSelect(FCmp, PosInf, Sqrt); in replacePowWithSqrt() 2197 Sqrt = B.CreateFDiv(ConstantFP::get(Ty, 1.0), Sqrt, "reciprocal"); in replacePowWithSqrt() 2199 return Sqrt; in replacePowWithSqrt() 2251 return Sqrt; in optimizePow() 2261 Value *Sqrt = nullptr; in optimizePow() local 2282 if (!Sqrt) in optimizePow() 2298 if (PowI && Sqrt) in optimizePow() [all …]
|
| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_fp16.td | 22 // Reciprocal/Sqrt
|
| H A D | arm_neon.td | 390 // E.3.10 Reciprocal/Sqrt 816 // Reciprocal/Sqrt 1746 // Reciprocal/Sqrt
|
| H A D | BuiltinsNVPTX.def | 405 // Sqrt
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM4.td | 105 // Most FP instructions are single-cycle latency, except MAC's, Div's and Sqrt's.
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedThunderX.td | 43 def THXT8XUnitFPMDS : ProcResource<1> { let BufferSize = 0; } // FP Mul/Div/Sqrt 161 // FP Mul, Div, Sqrt
|
| H A D | AArch64SchedA53.td | 48 def A53UnitFPMDS : ProcResource<1> { let BufferSize = 0; } // FP Mult/Div/Sqrt 134 // FP Mul, Div, Sqrt
|
| H A D | AArch64SchedA55.td | 187 // FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
|
| H A D | AArch64SchedA510.td | 200 // FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
|
| H A D | AArch64SchedTSV110.td | 96 // FP Div, Sqrt
|
| H A D | AArch64SchedThunderX2T99.td | 1110 // FP Mul, Div, Sqrt
|
| H A D | AArch64SchedThunderX3T110.td | 1218 // FP Mul, Div, Sqrt
|
| H A D | AArch64SchedA64FX.td | 1270 // FP Div, Sqrt
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 434 Function *Sqrt = Intrinsic::getDeclaration(M, Intrinsic::sqrt, Ty); in foldSqrt() local 435 Value *NewSqrt = Builder.CreateCall(Sqrt, Arg, "sqrt"); in foldSqrt()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSchedRocket.td | 43 def RocketUnitFPDivSqrt : ProcResource<1>; // FP Divide/Sqrt
|
| H A D | RISCVSchedSiFive7.td | 218 def SiFive7FDiv : ProcResource<1>; // FP Division/Sqrt
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 641 Value *Sqrt = Builder.CreateUnaryIntrinsic(Intrinsic::sqrt, XY, &I); in foldFMulReassoc() local 642 return replaceInstUsesWith(I, Sqrt); in foldFMulReassoc()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 17082 SDValue Sqrt, Y; in visitFDIV() local 17084 Sqrt = N1.getOperand(0); in visitFDIV() 17087 Sqrt = N1.getOperand(1); in visitFDIV() 17090 if (Sqrt.getNode()) { in visitFDIV() 17098 else if (Y == Sqrt.getOperand(0)) in visitFDIV() 17341 SDValue Sqrt = DAG.getNode(ISD::FSQRT, DL, VT, N->getOperand(0)); in visitFPOW() local 17342 SDValue SqrtSqrt = DAG.getNode(ISD::FSQRT, DL, VT, Sqrt); in visitFPOW() 17346 return DAG.getNode(ISD::FMUL, DL, VT, Sqrt, SqrtSqrt); in visitFPOW() 26860 SDValue Sqrt = RHS; in SimplifySelectOps() local 26879 Sqrt.getOperand(0) == CmpLHS && (CC == ISD::SETOLT || in SimplifySelectOps() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 397 return selectExtInst(ResVReg, ResType, I, CL::sqrt, GL::Sqrt); in spvSelect()
|
| H A D | SPIRVBuiltins.td | 377 defm : DemangledExtendedBuiltin<"Sqrt", GLSL_std_450, 31>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 961 // Sqrt
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXIntrinsics.td | 1112 // Sqrt
|