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Searched refs:SplitF64 (Results 1 – 4 of 4) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h46 SplitF64, enumerator
H A DRISCVInstrInfoD.td26 def RISCVSplitF64 : SDNode<"RISCVISD::SplitF64", SDT_RISCVSplitF64>;
H A DRISCVISelLowering.cpp11797 SDValue NewReg = DAG.getNode(RISCVISD::SplitF64, DL, in ReplaceNodeResults()
15152 case RISCVISD::SplitF64: { in PerformDAGCombine()
15183 DAG.getNode(RISCVISD::SplitF64, DL, DAG.getVTList(MVT::i32, MVT::i32), in PerformDAGCombine()
18395 SDValue SplitF64 = DAG.getNode( in LowerCall() local
18396 RISCVISD::SplitF64, DL, DAG.getVTList(MVT::i32, MVT::i32), ArgValue); in LowerCall()
18397 SDValue Lo = SplitF64.getValue(0); in LowerCall()
18398 SDValue Hi = SplitF64.getValue(1); in LowerCall()
18670 SDValue SplitF64 = DAG.getNode(RISCVISD::SplitF64, DL, in LowerReturn() local
18672 SDValue Lo = SplitF64.getValue(0); in LowerReturn()
18673 SDValue Hi = SplitF64.getValue(1); in LowerReturn()
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H A DRISCVISelDAGToDAG.cpp952 case RISCVISD::SplitF64: { in Select()