Home
last modified time | relevance | path

Searched refs:SparseBitVector (Results 1 – 17 of 17) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/ADT/
H A DSparseBitVector.h256 class SparseBitVector {
446 SparseBitVector(const SparseBitVector &RHS) in SparseBitVector() function
448 SparseBitVector(SparseBitVector &&RHS) in SparseBitVector() function
457 SparseBitVector& operator=(const SparseBitVector& RHS) {
465 SparseBitVector &operator=(SparseBitVector &&RHS) {
695 SparseBitVector RHS2Copy(RHS2); in intersectWithComplement()
849 inline SparseBitVector<ElementSize>
852 SparseBitVector<ElementSize> Result(LHS);
858 inline SparseBitVector<ElementSize>
867 inline SparseBitVector<ElementSize>
[all …]
H A DGenericUniformityImpl.h511 SparseBitVector<> FreshLabels;
/freebsd-14.2/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/
H A DHashTable.cpp22 SparseBitVector<> &V) { in readSparseBitVector()
44 SparseBitVector<> &Vec) { in writeSparseBitVector()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/DebugInfo/PDB/Native/
H A DHashTable.h28 Error readSparseBitVector(BinaryStreamReader &Stream, SparseBitVector<> &V);
29 Error writeSparseBitVector(BinaryStreamWriter &Writer, SparseBitVector<> &Vec);
266 mutable SparseBitVector<> Present;
267 mutable SparseBitVector<> Deleted;
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveIntervalUnion.h33 template <unsigned Element> class SparseBitVector; variable
35 using LiveVirtRegBitSet = SparseBitVector<128>;
H A DLiveVariables.h85 SparseBitVector<> AliveBlocks;
300 std::vector<SparseBitVector<>> &LiveInSets);
H A DMachineBasicBlock.h950 std::vector<SparseBitVector<>> *LiveInSets = nullptr);
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DPHIElimination.cpp98 std::vector<SparseBitVector<>> *LiveInSets);
158 std::vector<SparseBitVector<>> LiveInSets; in runOnMachineFunction()
169 SparseBitVector<>::iterator AliveBlockItr = VI.AliveBlocks.begin(); in runOnMachineFunction()
170 SparseBitVector<>::iterator EndItr = VI.AliveBlocks.end(); in runOnMachineFunction()
678 std::vector<SparseBitVector<>> *LiveInSets) { in SplitPHIEdges()
H A DLiveVariables.cpp670 SparseBitVector<> UseBlocks; in recomputeForSingleDefVirtReg()
874 std::vector<SparseBitVector<>> &LiveInSets) { in addNewBlock()
877 SparseBitVector<> &BV = LiveInSets[SuccBB->getNumber()]; in addNewBlock()
H A DMachineBasicBlock.cpp1134 std::vector<SparseBitVector<>> *LiveInSets) { in SplitCriticalEdge()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DAMDGPUEmitPrintf.cpp184 static void locateCStrings(SparseBitVector<8> &BV, StringRef Str) { in locateCStrings()
224 bool isConstFmtStr, SparseBitVector<8> &SpecIsCString, in callBufferedPrintfStart()
374 Value *PtrToStore, SparseBitVector<8> &SpecIsCString, in callBufferedPrintfArgPush()
434 SparseBitVector<8> SpecIsCString; in emitAMDGPUPrintfCall()
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp641 static DiffVec &diffEncode(DiffVec &V, SparseBitVector<> List) { in diffEncode()
643 SparseBitVector<>::iterator I = List.begin(), E = List.end(); in diffEncode()
927 const SparseBitVector<> &RUs = Reg.getNativeRegUnits(); in runMCDesc()
H A DCodeGenRegisters.h230 typedef SparseBitVector<> RegUnitList;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DBlockFrequencyInfoImpl.cpp306 SparseBitVector<> SavedIsIrrLoopHeader(std::move(BFI.IsIrrLoopHeader)); in cleanup()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DBlockFrequencyInfoImpl.h426 SparseBitVector<> IsIrrLoopHeader;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp1274 SparseBitVector<> LoadDepRegs; in tracePredStateThroughBlocksAndHarden()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DNewGVN.cpp569 DenseMap<BasicBlock *, SparseBitVector<>> RevisitOnReachabilityChange;