| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFExpression.h | 49 SignBit = 0x80, enumerator
50 SignedSize1 = SignBit | Size1,
51 SignedSize2 = SignBit | Size2,
52 SignedSize4 = SignBit | Size4,
53 SignedSize8 = SignBit | Size8,
54 SignedSizeLEB = SignBit | SizeLEB,
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | ValueTracking.h | 223 std::optional<bool> SignBit; member
231 return KnownFPClasses == fcAllFlags && !SignBit; in isUnknown()
328 if (SignBit != RHS.SignBit)
329 SignBit = std::nullopt;
339 if (SignBit) in fneg()
340 SignBit = !*SignBit; in fneg()
367 SignBit = false; in signBitMustBeZero()
383 SignBit = Sign.SignBit; in copysign()
386 if (Sign.isKnownNever(fcPositive | fcNan) || (SignBit && *SignBit)) in copysign()
388 if (Sign.isKnownNever(fcNegative | fcNan) || (SignBit && !*SignBit)) in copysign()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 345 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
349 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftenFloatRes_FCOPYSIGN()
354 SignBit = in SoftenFloatRes_FCOPYSIGN()
359 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
361 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
362 SignBit = in SoftenFloatRes_FCOPYSIGN()
2911 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftPromoteHalfRes_FCOPYSIGN()
2916 SignBit = in SoftPromoteHalfRes_FCOPYSIGN()
2921 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftPromoteHalfRes_FCOPYSIGN()
2923 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); in SoftPromoteHalfRes_FCOPYSIGN()
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| H A D | LegalizeDAG.cpp | 72 uint8_t SignBit; member
1567 State.SignBit = NumBits - 1; in getSignAsIntValue()
1603 State.SignBit = 7; in getSignAsIntValue()
1641 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1655 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; in ExpandFCOPYSIGN()
1657 if (SignBit.getScalarValueSizeInBits() < in ExpandFCOPYSIGN()
1659 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
1664 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1667 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1669 if (SignBit.getScalarValueSizeInBits() > in ExpandFCOPYSIGN()
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| H A D | DAGCombiner.cpp | 15229 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
15233 FlipBit = SignBit; in visitBITCAST()
15242 FlipBit = DAG.getNode(ISD::AND, SDLoc(N0), MVT::i64, Hi, SignBit); in visitBITCAST()
15250 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
15253 NewConv, DAG.getConstant(SignBit, DL, VT)); in visitBITCAST()
15256 NewConv, DAG.getConstant(~SignBit, DL, VT)); in visitBITCAST()
15298 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
15312 DAG.getConstant(SignBit, SDLoc(XorResult64), MVT::i64)); in visitBITCAST()
15319 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
15321 X, DAG.getConstant(SignBit, SDLoc(X), VT)); in visitBITCAST()
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| H A D | TargetLowering.cpp | 8438 APInt SignBit = APInt::getSignMask(BitSize); in expandIS_FPCLASS() local
8451 SDValue SignBitV = DAG.getConstant(SignBit, DL, IntVT); in expandIS_FPCLASS()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Integral.h | 155 const ReprT SignBit = ReprT(1) << (TruncBits - 1);
157 return Integral((V & BitMask) | (Signed && (V & SignBit) ? ExtMask : 0));
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFExpression.cpp | 155 unsigned Signed = Size & Operation::SignBit; in extract()
157 switch (Size & ~Operation::SignBit) { in extract()
318 unsigned Signed = Size & Operation::SignBit; in print()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1516 auto SignBit = B.buildShl(S64, ShiftOffset, ExtShift); in applyMappingBFE() local
1518 B.buildAShr(S64, SignBit, ExtShift); in applyMappingBFE()
1520 B.buildLShr(S64, SignBit, ExtShift); in applyMappingBFE()
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| H A D | AMDGPULegalizerInfo.cpp | 2436 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc() local
2443 auto SignBit64 = B.buildMergeLikeInstr(S64, {Zero32, SignBit}); in legalizeIntrinsicTrunc()
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| H A D | AMDGPUISelLowering.cpp | 2381 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
2384 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit}); in LowerFTRUNC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 4346 Known.SignBit = CFP->isNegative(); in computeKnownFPClass()
4545 Known.SignBit = false; in computeKnownFPClass()
4727 Known.SignBit = false; in computeKnownFPClass()
5096 Known.SignBit = std::nullopt; in computeKnownFPClass()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 1828 APInt SignBit = APInt::getSignMask(Ty->getScalarSizeInBits()); in visitCallInst() local
1829 return SelectInst::Create(X, ConstantInt::get(Ty, SignBit), in visitCallInst()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6621 auto SignBit = MIRBuilder.buildConstant(S64, 63); in lowerSITOFP() local
6622 auto S = MIRBuilder.buildAShr(S64, L, SignBit); in lowerSITOFP()
7808 APInt SignBit = APInt::getSignMask(BitSize); in lowerISFPCLASS() local
7817 auto SignBitC = MIRBuilder.buildConstant(IntTy, SignBit); in lowerISFPCLASS()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 15187 APInt SignBit = APInt::getSignMask(32); in PerformDAGCombine() local
15190 DAG.getConstant(SignBit, DL, MVT::i32)); in PerformDAGCombine()
15195 DAG.getConstant(~SignBit, DL, MVT::i32)); in PerformDAGCombine()
15252 APInt SignBit = APInt::getSignMask(FPBits).sext(VT.getSizeInBits()); in PerformDAGCombine() local
15255 DAG.getConstant(SignBit, DL, VT)); in PerformDAGCombine()
15259 DAG.getConstant(~SignBit, DL, VT)); in PerformDAGCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21762 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask); in LowerFCOPYSIGN() local
21780 SDValue Or = DAG.getNode(X86ISD::FOR, dl, LogicVT, MagBits, SignBit); in LowerFCOPYSIGN()
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