| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Schedule.td | 25 def WriteISReg : SchedWrite; // ALU of Shifted-Reg
28 def ReadISReg : SchedRead; // ALU of Shifted-Reg
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| H A D | AArch64SchedA55.td | 68 def : WriteRes<WriteISReg, [CortexA55UnitALU]> { let Latency = 3; } // ALU of Shifted-Reg
223 // Shifted operand
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| H A D | AArch64SchedTSV110.td | 377 // Shifted Register with Shift == 0
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| H A D | AArch64SchedA57.td | 144 // Shifted Register with Shift == 0
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| H A D | AArch64SchedAmpere1.td | 591 } // ALU of Shifted-Reg
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| H A D | AArch64SchedAmpere1B.td | 547 } // ALU of Shifted-Reg
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| H A D | AArch64SchedA510.td | 70 def : WriteRes<WriteISReg, [CortexA510UnitALU]> { let Latency = 2; } // ALU of Shifted-Reg
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| H A D | AArch64ISelLowering.cpp | 14184 SDValue Shifted = in getVectorBitwiseReduce() local
14186 Scalar = DAG.getNode(ScalarOpcode, DL, ScalarVT, Scalar, Shifted); in getVectorBitwiseReduce()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Tooling/ASTDiff/ |
| H A D | ASTDiff.cpp | 149 int findPositionInParent(NodeId Id, bool Shifted = false) const;
338 int SyntaxTree::Impl::findPositionInParent(NodeId Id, bool Shifted) const { in findPositionInParent()
345 if (Shifted) in findPositionInParent()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 2926 unsigned Shifted = 0; in alignToARMConstant() local
2933 Shifted += 2; in alignToARMConstant()
2942 if (Shifted > 24) in alignToARMConstant()
2943 Value = Value >> (Shifted - 24); in alignToARMConstant()
2945 Value = Value << (24 - Shifted); in alignToARMConstant()
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| H A D | ARMScheduleM7.td | 322 // Shifted ALU operands are read a cycle early.
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| H A D | ARMInstrThumb2.td | 54 // Shifted operands. No register controlled shifts for Thumb2.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 2075 Value *Shifted = IC.Builder.CreateLShr(Masked, ShiftAmt); in instCombineIntrinsic() local
2076 return IC.replaceInstUsesWith(II, Shifted); in instCombineIntrinsic()
2118 Value *Shifted = IC.Builder.CreateShl(Input, ShiftAmt); in instCombineIntrinsic() local
2119 Value *Masked = IC.Builder.CreateAnd(Shifted, II.getArgOperand(1)); in instCombineIntrinsic()
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| H A D | X86ISelLowering.cpp | 27525 SDValue Shifted = in LowerSET_ROUNDING() local
27528 RMBits = DAG.getNode(ISD::AND, DL, MVT::i16, Shifted, in LowerSET_ROUNDING()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorCombine.cpp | 1852 Value *Shifted = Op.X.Sgn == Signed || Op.Y.Sgn == Signed in processFxpMulChopped() local
1855 return Builder.CreateTrunc(Shifted, InpTy, "trn"); in processFxpMulChopped()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 5932 const SCEV *Shifted = SCEVShiftRewriter::rewrite(BEValue, L, *this); in createAddRecFromPHI() local
5933 const SCEV *Start = SCEVInitRewriter::rewrite(Shifted, L, *this, false); in createAddRecFromPHI()
5934 if (Shifted != getCouldNotCompute() && in createAddRecFromPHI()
5942 insertValueToMap(PN, Shifted); in createAddRecFromPHI()
5943 return Shifted; in createAddRecFromPHI()
13239 const SCEV *Shifted = SE.getAddRecExpr(Operands, getLoop(), in getNumIterationsInRange() local
13241 if (const auto *ShiftedAddRec = dyn_cast<SCEVAddRecExpr>(Shifted)) in getNumIterationsInRange()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Format/ |
| H A D | Format.cpp | 3551 auto Shifted = tooling::Replacement(FileName, NewOffset, 0, in fixCppIncludeInsertions() local
3553 Result = Result.merge(tooling::Replacements(Shifted)); in fixCppIncludeInsertions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3666 auto Shifted = MIRBuilder.buildAShr(Ty, Res, ShiftAmt); in lower() local
3667 MIRBuilder.buildICmp(CmpInst::ICMP_NE, Overflow, HiPart, Shifted); in lower()
7773 auto Shifted = MIRBuilder.buildInstr(ShiftOp, {WideTy}, {Mul, ShiftAmt}); in lowerSMULH_UMULH() local
7774 MIRBuilder.buildTrunc(Result, Shifted); in lowerSMULH_UMULH()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 6769 Value *Shifted = Builder.CreateLShr(TableMask, MaskIndex, "switch.shifted"); in SwitchToLookupTable() local
6771 Shifted, Type::getInt1Ty(Mod.getContext()), "switch.lobit"); in SwitchToLookupTable()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 1309 /// Shifted addition
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11278 SDValue Shifted = DAG.getNode(ISD::SRL, DL, XLenVT, in lowerGET_ROUNDING() local
11280 SDValue Masked = DAG.getNode(ISD::AND, DL, XLenVT, Shifted, in lowerGET_ROUNDING()
11310 SDValue Shifted = DAG.getNode(ISD::SRL, DL, XLenVT, in lowerSET_ROUNDING() local
11312 RMValue = DAG.getNode(ISD::AND, DL, XLenVT, Shifted, in lowerSET_ROUNDING()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 13805 auto Shifted = DAG.getNode(ISD::SRL, DL, MVT::i64, SubNode, in generateEquivalentSub() local
13807 auto Final = Shifted; in generateEquivalentSub()
13811 Final = DAG.getNode(ISD::XOR, DL, MVT::i64, Shifted, in generateEquivalentSub()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 646 SDValue MatchRotatePosNeg(SDValue Shifted, SDValue Pos, SDValue Neg,
8299 SDValue DAGCombiner::MatchRotatePosNeg(SDValue Shifted, SDValue Pos, in MatchRotatePosNeg() argument
8311 EVT VT = Shifted.getValueType(); in MatchRotatePosNeg()
8314 return DAG.getNode(HasPos ? PosOpcode : NegOpcode, DL, VT, Shifted, in MatchRotatePosNeg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 14304 SDValue Shifted = DAG.getZExtOrTrunc(Shift.getOperand(0), in performCvtF32UByteNCombine() local
14315 MVT::f32, Shifted); in performCvtF32UByteNCombine()
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| /freebsd-14.2/contrib/ncurses/misc/ |
| H A D | terminfo.src | 2156 # Shifted f1-f12 give cons25 codes, rather than xterm function-keys
2481 # Scroll 0-Jump Shifted 3 0-#
4246 # Shifted F1 is F11. F13-F20 inherit from the defaults, and the last distinct
7583 # Shifted cursor-keys send nothing, but xterm modifiers for control+shift
11242 # Shifted Function Keys:
14872 # 1= Shifted
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