| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 970 MVT ShiftVT = in getShiftAmountTy() local
974 if (ShiftVT.getSizeInBits() < Log2_32_Ceil(LHSTy.getSizeInBits())) in getShiftAmountTy()
975 ShiftVT = MVT::i32; in getShiftAmountTy()
976 assert(ShiftVT.getSizeInBits() >= Log2_32_Ceil(LHSTy.getSizeInBits()) && in getShiftAmountTy()
978 return ShiftVT; in getShiftAmountTy()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4419 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local
4428 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local
4948 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local
5191 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMULHU() local
8160 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local
9822 EVT ShiftVT = C1->getValueType(0); in visitRotate() local
9852 EVT ShiftVT = N1.getValueType(); in visitSHL() local
9965 Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, Sum, N1); in visitSHL()
10328 EVT ShiftVT = N1.getValueType(); in visitSRA() local
10329 EVT ShiftSVT = ShiftVT.getScalarType(); in visitSRA()
[all …]
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| H A D | LegalizeDAG.cpp | 1656 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local
1660 ShiftVT = MagVT; in ExpandFCOPYSIGN()
1663 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1664 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1666 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1667 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
2726 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local
2727 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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| H A D | TargetLowering.cpp | 1725 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1748 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1787 TLO.DAG.getConstant(ShAmt - InnerShAmt, dl, ShiftVT); in SimplifyDemandedBits()
1900 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1928 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1992 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
2080 SDValue NewSA = TLO.DAG.getConstant(BitWidth - 1 - Log2, dl, ShiftVT); in SimplifyDemandedBits()
4207 EVT ShiftVT = getShiftAmountTy(OpVT, DAG.getDataLayout(), in foldSetCCWithBinOp() local
4209 SDValue One = DAG.getConstant(1, DL, ShiftVT); in foldSetCCWithBinOp()
8227 EVT ShiftVT = getShiftAmountTy(SrcVT, DAG.getDataLayout()); in expandUINT_TO_FP() local
[all …]
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| H A D | SelectionDAG.cpp | 1734 EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes); in getShiftAmountConstant() local
1735 return getConstant(Val, DL, ShiftVT); in getShiftAmountConstant()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 9172 MVT ShiftVT = widenMaskVectorType(ResVT, Subtarget); in LowerCONCAT_VECTORSvXi1() local
9174 Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, Op, in LowerCONCAT_VECTORSvXi1()
11577 MVT ShiftVT; in lowerShuffleAsShift() local
11600 V = DAG.getBitcast(ShiftVT, V); in lowerShuffleAsShift()
11601 V = DAG.getNode(Opcode, DL, ShiftVT, V, in lowerShuffleAsShift()
28981 MVT ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerShiftByScalarImmediate() local
46861 EVT ShiftVT = VT.isVector() ? VT : MVT::i8; in combineMul() local
53215 MVT ShiftVT = SrcVT; in combineMOVMSK() local
53218 if (ShiftVT.getScalarType() == MVT::i8) { in combineMOVMSK()
53221 ShiftLHS = DAG.getBitcast(ShiftVT, ShiftLHS); in combineMOVMSK()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 6688 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local
6693 ShiftVT)); in combineSIGN_EXTEND()
6695 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6678 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
6680 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
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