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Searched refs:ShiftAmt (Results 1 – 25 of 68) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Support/
H A DKnownBits.cpp193 Known.Zero.setLowBits(ShiftAmt); in shl()
198 if (NUW && ShiftAmt != 0) in shl()
254 for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount; in shl() local
255 ++ShiftAmt) { in shl()
258 (ShiftAmtOneMask | ShiftAmt) != ShiftAmt) in shl()
300 for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount; in lshr() local
301 ++ShiftAmt) { in lshr()
304 (ShiftAmtOneMask | ShiftAmt) != ShiftAmt) in lshr()
348 for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount; in ashr() local
349 ++ShiftAmt) { in ashr()
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H A DAPInt.cpp1026 void APInt::ashrSlowCase(unsigned ShiftAmt) { in ashrSlowCase() argument
1028 if (!ShiftAmt) in ashrSlowCase()
1035 unsigned WordShift = ShiftAmt / APINT_BITS_PER_WORD; in ashrSlowCase()
1036 unsigned BitShift = ShiftAmt % APINT_BITS_PER_WORD; in ashrSlowCase()
1075 void APInt::lshrSlowCase(unsigned ShiftAmt) { in lshrSlowCase() argument
1076 tcShiftRight(U.pVal, getNumWords(), ShiftAmt); in lshrSlowCase()
1087 void APInt::shlSlowCase(unsigned ShiftAmt) { in shlSlowCase() argument
1088 tcShiftLeft(U.pVal, getNumWords(), ShiftAmt); in shlSlowCase()
2257 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); in toString() local
2263 Tmp.lshrInPlace(ShiftAmt); in toString()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DDemandedBits.cpp130 uint64_t ShiftAmt = SA->urem(BitWidth); in determineLiveOperandBits() local
132 ShiftAmt = BitWidth - ShiftAmt; in determineLiveOperandBits()
135 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
137 AB = AOut.shl(BitWidth - ShiftAmt); in determineLiveOperandBits()
179 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
185 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in determineLiveOperandBits()
187 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
196 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
201 AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
210 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/ADT/
H A DAPInt.h766 if (ShiftAmt == BitWidth)
769 U.VAL <<= ShiftAmt;
772 shlSlowCase(ShiftAmt);
807 R.ashrInPlace(ShiftAmt); in ashr()
816 if (ShiftAmt == BitWidth) in ashrInPlace()
823 ashrSlowCase(ShiftAmt); in ashrInPlace()
842 U.VAL >>= ShiftAmt; in lshrInPlace()
845 lshrSlowCase(ShiftAmt); in lshrInPlace()
888 R.ashrInPlace(ShiftAmt); in ashr()
900 R.lshrInPlace(ShiftAmt); in lshr()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.cpp69 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
72 for (; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
73 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
81 AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt) }); in tryToreplicateChunks()
89 for (ShiftAmt += 16; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
90 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
96 AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt) }); in tryToreplicateChunks()
H A DAArch64ConditionOptimizer.cpp175 unsigned ShiftAmt = AArch64_AM::getShiftValue(I.getOperand(3).getImm()); in findSuitableCompare() local
179 } else if (I.getOperand(2).getImm() << ShiftAmt >= 0xfff) { in findSuitableCompare()
H A DAArch64ISelDAGToDAG.cpp584 unsigned ShiftAmt; in SelectArithImmed() local
587 ShiftAmt = 0; in SelectArithImmed()
589 ShiftAmt = 12; in SelectArithImmed()
2702 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
2704 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
2710 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
2712 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
3606 SDValue ShiftAmt = N->getOperand(1); in tryShiftAmountMod() local
3613 ShiftAmt = ShiftAmt->getOperand(0); in tryShiftAmountMod()
3615 if (ShiftAmt->getOpcode() == ISD::ADD || ShiftAmt->getOpcode() == ISD::SUB) { in tryShiftAmountMod()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp670 DemandedMaskIn.setHighBits(ShiftAmt+1); in SimplifyDemandedUseBits()
672 DemandedMaskIn.setHighBits(ShiftAmt); in SimplifyDemandedUseBits()
740 Known.Zero.lshrInPlace(ShiftAmt); in SimplifyDemandedUseBits()
741 Known.One.lshrInPlace(ShiftAmt); in SimplifyDemandedUseBits()
742 if (ShiftAmt) in SimplifyDemandedUseBits()
790 Known.Zero.lshrInPlace(ShiftAmt); in SimplifyDemandedUseBits()
791 Known.One.lshrInPlace(ShiftAmt); in SimplifyDemandedUseBits()
796 if (Known.Zero[BitWidth-ShiftAmt-1] || in SimplifyDemandedUseBits()
983 uint64_t ShiftAmt = SA->urem(BitWidth); in SimplifyDemandedUseBits() local
985 ShiftAmt = BitWidth - ShiftAmt; in SimplifyDemandedUseBits()
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H A DInstCombineCasts.cpp1046 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local
1047 BitsToClear = ShiftAmt < BitsToClear ? BitsToClear - ShiftAmt : 0; in canEvaluateZExtd()
1300 unsigned ShiftAmt = KnownZeroMask.countr_zero(); in transformSExtICmp() local
1302 if (ShiftAmt) in transformSExtICmp()
1304 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
1314 unsigned ShiftAmt = KnownZeroMask.countl_zero(); in transformSExtICmp() local
1316 if (ShiftAmt) in transformSExtICmp()
1318 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
H A DInstCombineCompares.cpp2247 const APInt *ShiftAmt; in foldICmpShlConstant() local
2248 if (!match(Shl->getOperand(1), m_APInt(ShiftAmt))) in foldICmpShlConstant()
2254 if (ShiftAmt->uge(TypeBits)) in foldICmpShlConstant()
2266 APInt ShiftedC = C.ashr(*ShiftAmt); in foldICmpShlConstant()
2270 C.ashr(*ShiftAmt).shl(*ShiftAmt) == C) { in foldICmpShlConstant()
2271 APInt ShiftedC = C.ashr(*ShiftAmt); in foldICmpShlConstant()
2280 APInt ShiftedC = (C - 1).ashr(*ShiftAmt) + 1; in foldICmpShlConstant()
2291 APInt ShiftedC = C.lshr(*ShiftAmt); in foldICmpShlConstant()
2295 C.lshr(*ShiftAmt).shl(*ShiftAmt) == C) { in foldICmpShlConstant()
2296 APInt ShiftedC = C.lshr(*ShiftAmt); in foldICmpShlConstant()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DVNCoercion.cpp140 uint64_t ShiftAmt = DL.getTypeStoreSizeInBits(StoredValTy).getFixedValue() - in coerceAvailableValueToLoadType() local
143 StoredVal, ConstantInt::get(StoredVal->getType(), ShiftAmt)); in coerceAvailableValueToLoadType()
320 unsigned ShiftAmt; in getStoreValueForLoadHelper() local
322 ShiftAmt = Offset * 8; in getStoreValueForLoadHelper()
324 ShiftAmt = (StoreSize - LoadSize - Offset) * 8; in getStoreValueForLoadHelper()
325 if (ShiftAmt) in getStoreValueForLoadHelper()
327 ConstantInt::get(SrcVal->getType(), ShiftAmt)); in getStoreValueForLoadHelper()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DAtomicExpandPass.cpp641 Value *ShiftAmt = nullptr; member
664 PrintObj(PMV.ShiftAmt); in operator <<()
712 PMV.ShiftAmt = ConstantInt::get(PMV.ValueType, 0); in createMaskInstrs()
741 PMV.ShiftAmt = Builder.CreateShl(PtrLSB, 3); in createMaskInstrs()
744 PMV.ShiftAmt = Builder.CreateShl( in createMaskInstrs()
748 PMV.ShiftAmt = Builder.CreateTrunc(PMV.ShiftAmt, PMV.WordType, "ShiftAmt"); in createMaskInstrs()
764 Value *Shift = Builder.CreateLShr(WideWord, PMV.ShiftAmt, "shifted"); in extractMaskedValue()
780 Builder.CreateShl(ZExt, PMV.ShiftAmt, "shifted", /*HasNUW*/ true); in insertMaskedValue()
864 PMV.ShiftAmt, "ValOperand_Shifted"); in expandPartwordAtomicRMW()
904 PMV.ShiftAmt, "ValOperand_Shifted"); in widenPartwordAtomicRMW()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp345 int64_t ShiftAmt; in matchCvtF32UByteN() local
346 IsShr = mi_match(SrcReg, MRI, m_GLShr(m_Reg(Src0), m_ICst(ShiftAmt))); in matchCvtF32UByteN()
347 if (IsShr || mi_match(SrcReg, MRI, m_GShl(m_Reg(Src0), m_ICst(ShiftAmt)))) { in matchCvtF32UByteN()
352 ShiftOffset += ShiftAmt; in matchCvtF32UByteN()
354 ShiftOffset -= ShiftAmt; in matchCvtF32UByteN()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp185 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
198 ShiftAmt = SCVMinus1.logBase2(); in matchAArch64MulConstCombine()
201 ShiftAmt = CVPlus1.logBase2(); in matchAArch64MulConstCombine()
211 ShiftAmt = CVNegPlus1.logBase2(); in matchAArch64MulConstCombine()
215 ShiftAmt = CVNegMinus1.logBase2(); in matchAArch64MulConstCombine()
226 auto Shift = B.buildConstant(LLT::scalar(64), ShiftAmt); in matchAArch64MulConstCombine()
H A DAArch64PostLegalizerLowering.cpp849 uint64_t ShiftAmt = MaybeShiftAmt->Value.getZExtValue(); in getCmpOperandFoldingProfit() local
857 return (ShiftAmt <= 4) ? 2 : 1; in getCmpOperandFoldingProfit()
863 if ((ShiftSize == 32 && ShiftAmt <= 31) || in getCmpOperandFoldingProfit()
864 (ShiftSize == 64 && ShiftAmt <= 63)) in getCmpOperandFoldingProfit()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1959 if (ShiftAmt % 8 == 6) { in insertMultibyteShift()
2016 if (ShiftAmt % 8 == 6) { in insertMultibyteShift()
2055 ShiftAmt -= 8; in insertMultibyteShift()
2074 for (; ShiftAmt >= 8; ShiftAmt -= 8) { in insertMultibyteShift()
2138 ShiftAmt -= 4; in insertMultibyteShift()
2143 while (ShiftLeft && ShiftAmt) { in insertMultibyteShift()
2160 ShiftAmt--; in insertMultibyteShift()
2162 while (!ShiftLeft && ShiftAmt) { in insertMultibyteShift()
2176 ShiftAmt--; in insertMultibyteShift()
2179 if (ShiftAmt != 0) { in insertMultibyteShift()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp440 unsigned &ShiftAmt, unsigned &AddOpc) { in generateTwoRegInstSeq() argument
456 ShiftAmt = TzHi - TzLo; in generateTwoRegInstSeq()
459 if (Tmp == ((uint64_t)LoVal << ShiftAmt)) in generateTwoRegInstSeq()
464 ShiftAmt = 32; in generateTwoRegInstSeq()
H A DRISCVMatInt.h57 unsigned &ShiftAmt, unsigned &AddOpc);
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp2068 if (ShiftAmt != 1 && ShiftAmt != 2 && ShiftAmt != 3) in foldMaskedShiftToScaledMask()
2094 AM.Scale = 1 << ShiftAmt; in foldMaskedShiftToScaledMask()
3820 NBits = ShiftAmt; in matchBitExtract()
3999 ShiftAmt = CurDAG->getNode(ISD::ZERO_EXTEND, DL, MVT::i32, ShiftAmt); in matchBitExtract()
4229 SDValue ShiftAmt = OrigShiftAmt; in tryShiftAmountMod() local
4234 ShiftAmt = ShiftAmt->getOperand(0); in tryShiftAmountMod()
4240 if (ShiftAmt->getOpcode() == ISD::ADD || ShiftAmt->getOpcode() == ISD::SUB || in tryShiftAmountMod()
4251 } else if (ShiftAmt->getOpcode() != ISD::ADD && ShiftAmt.hasOneUse() && in tryShiftAmountMod()
5902 unsigned ShiftAmt; in Select() local
5918 ShiftAmt = TrailingZeros; in Select()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLoadStoreOpt.cpp650 int64_t ShiftAmt; in getTruncStoreByteOffset() local
652 m_any_of(m_GLShr(m_Reg(FoundSrcVal), m_ICst(ShiftAmt)), in getTruncStoreByteOffset()
653 m_GAShr(m_Reg(FoundSrcVal), m_ICst(ShiftAmt))))) { in getTruncStoreByteOffset()
663 if (ShiftAmt % NarrowBits != 0) in getTruncStoreByteOffset()
665 const unsigned Offset = ShiftAmt / NarrowBits; in getTruncStoreByteOffset()
H A DLegalizerHelper.cpp279 auto ShiftAmt = in buildLCMMergePieces() local
1815 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); in widenScalarMergeValues() local
1946 auto Shr = MIRBuilder.buildLShr(SrcTy, SrcReg, ShiftAmt); in widenScalarUnmergeValues()
2464 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits); in widenScalar() local
3666 auto Shifted = MIRBuilder.buildAShr(Ty, Res, ShiftAmt); in lower()
6930 auto Shift = MIRBuilder.buildShl(Src0Ty, Zext, ShiftAmt); in lowerFCopySign()
7068 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); in lowerMergeValues() local
7109 auto ShiftAmt = MIRBuilder.buildConstant(IntTy, Offset); in lowerUnmergeValues() local
7665 auto ShiftAmt = MIRBuilder.buildConstant(Ty, BaseShiftAmt); in lowerBswap() local
8031 auto ShiftAmt = in lowerAbsToAddXor() local
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H A DCombinerHelper.cpp1913 MatchData.Imm = ShiftAmt; in matchCombineShlOfExtend()
1917 return MinLeadingZeros >= ShiftAmt && ShiftAmt < SrcTySize; in matchCombineShlOfExtend()
2032 unsigned ShiftAmt = Dst0Ty.getSizeInBits(); in matchCombineUnmergeConstant() local
2035 Csts.emplace_back(Val.trunc(ShiftAmt)); in matchCombineUnmergeConstant()
2036 Val = Val.lshr(ShiftAmt); in matchCombineUnmergeConstant()
2264 unsigned ShiftAmt; in tryCombineShiftToUnmerge() local
3110 int64_t ShiftAmt; in applyAshShlToSextInreg() local
3111 std::tie(Src, ShiftAmt) = MatchInfo; in applyAshShlToSextInreg()
5307 auto ShiftAmt = in applyUMulHToLShr() local
6053 std::optional<ValueAndVReg> ShiftAmt; in matchTruncLshrBuildVectorFold() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp222 unsigned ShiftAmt, AddOpc; in selectImm() local
224 RISCVMatInt::generateTwoRegInstSeq(Imm, Subtarget, ShiftAmt, AddOpc); in selectImm()
230 CurDAG->getTargetConstant(ShiftAmt, DL, VT)), in selectImm()
2340 uint64_t ShiftAmt = 0; in SelectAddrRegRegScale() local
2347 ShiftAmt = N.getConstantOperandVal(1); in SelectAddrRegRegScale()
2351 Shift = CurDAG->getTargetConstant(ShiftAmt, SDLoc(N), VT); in SelectAddrRegRegScale()
2352 return ShiftAmt != 0; in SelectAddrRegRegScale()
2688 auto UnwrapShlSra = [](SDValue N, unsigned ShiftAmt) { in selectSExtBits() argument
2694 N.getConstantOperandVal(1) == ShiftAmt && in selectSExtBits()
2695 N0.getConstantOperandVal(1) == ShiftAmt) in selectSExtBits()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h179 Value *Mask, Value *ShiftAmt,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1825 unsigned ShiftAmt; in emitIntSExt32r1() local
1830 ShiftAmt = 24; in emitIntSExt32r1()
1833 ShiftAmt = 16; in emitIntSExt32r1()
1837 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1838 emitInst(Mips::SRA, DestReg).addReg(TempReg).addImm(ShiftAmt); in emitIntSExt32r1()

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