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Searched refs:ShTy (Results 1 – 4 of 4) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp2827 EVT ShTy = N->getOperand(1).getValueType(); in ExpandShiftByConstant() local
2879 DAG.getConstant(NVTBits - 1, DL, ShTy)); in ExpandShiftByConstant()
2883 DAG.getConstant(NVTBits - 1, DL, ShTy)); in ExpandShiftByConstant()
2902 EVT ShTy = Amt.getValueType(); in ExpandShiftWithKnownAmountBit() local
2903 unsigned ShBits = ShTy.getScalarSizeInBits(); in ExpandShiftWithKnownAmountBit()
2924 Amt = DAG.getNode(ISD::AND, dl, ShTy, Amt, in ExpandShiftWithKnownAmountBit()
2951 SDValue Amt2 = DAG.getNode(ISD::XOR, dl, ShTy, Amt, in ExpandShiftWithKnownAmountBit()
2989 EVT ShTy = Amt.getValueType(); in ExpandShiftWithUnknownAmountBit() local
2999 SDValue NVBitsNode = DAG.getConstant(NVTBits, dl, ShTy); in ExpandShiftWithUnknownAmountBit()
3002 SDValue isShort = DAG.getSetCC(dl, getSetCCResultType(ShTy), in ExpandShiftWithUnknownAmountBit()
[all …]
H A DSelectionDAG.cpp2367 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout()); in getShiftAmountOperand() local
2368 if (OpTy == ShTy || OpTy.isVector()) return Op; in getShiftAmountOperand()
2370 return getZExtOrTrunc(Op, SDLoc(Op), ShTy); in getShiftAmountOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp6221 LLT ShTy = MRI.getType(Z); in lowerFunnelShiftWithInverse() local
6234 auto Zero = MIRBuilder.buildConstant(ShTy, 0); in lowerFunnelShiftWithInverse()
6239 auto One = MIRBuilder.buildConstant(ShTy, 1); in lowerFunnelShiftWithInverse()
6248 Z = MIRBuilder.buildNot(ShTy, Z).getReg(0); in lowerFunnelShiftWithInverse()
6260 LLT ShTy = MRI.getType(Z); in lowerFunnelShiftAsShifts() local
6273 auto BitWidthC = MIRBuilder.buildConstant(ShTy, BW); in lowerFunnelShiftAsShifts()
6281 auto Mask = MIRBuilder.buildConstant(ShTy, BW - 1); in lowerFunnelShiftAsShifts()
6286 auto NotZ = MIRBuilder.buildNot(ShTy, Z); in lowerFunnelShiftAsShifts()
6289 auto BitWidthC = MIRBuilder.buildConstant(ShTy, BW); in lowerFunnelShiftAsShifts()
6294 auto One = MIRBuilder.buildConstant(ShTy, 1); in lowerFunnelShiftAsShifts()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp3636 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedRegister() argument
3640 Op->RegShiftedReg.ShiftTy = ShTy; in CreateShiftedRegister()
3650 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedImmediate() argument
3653 Op->RegShiftedImm.ShiftTy = ShTy; in CreateShiftedImmediate()