Searched refs:Sequencer (Results 1 – 9 of 9) sorted by relevance
7 title: Analog Devices ADM1266 Cascadable Super Sequencer with Margin14 Analog Devices ADM1266 Cascadable Super Sequencer with Margin
1755 seq = sequencer.Sequencer(name)1798 seq = sequencer.Sequencer(name)1823 seq = sequencer.Sequencer('Header-pack')1835 seq = sequencer.Sequencer('Header-unpack')
466 class Sequencer(object): class
147 >>>4 byte 0x03 PATR (Sequencer Pattern Request)148 >>>4 byte 0x13 PATD (Sequencer Pattern Dump)149 >>>4 byte 0x23 PATP (Sequencer Pattern Parameter Change)150 >>>4 byte 0x33 PATQ (Sequencer Pattern Parameter Inquiry)151 >>>4 byte 0x73 AFM (Sequencer Pattern Reserved)
115 * Sequencer Interrupt Code284 * Sequencer Interrupt Status811 * CMC Sequencer Byte Count820 * Overlay Sequencer Byte Count1003 * SG Sequencer Byte Count3191 * Sequencer Control 03209 * Sequencer Control 13222 * Sequencer Flags3233 * Sequencer Interrupt Control3248 * Sequencer RAM Data Port[all …]
565 * Sequencer Control (p. 3-33)582 * Sequencer RAM Data (p. 3-34)594 * Sequencer Address Registers (p. 3-35)1280 * the BIOS. The Sequencer relies on a per-SCB field to1291 * the BIOS. The Sequencer relies in a per-SCB field to control the
31 The Flexible Power Sequencer (FPS) allows each regulator to power up under
187 Sequencer DRAM parameters and control registers. Used for Self-Refresh
23093 5050 GC5050 Dynamic Digital I/O with Algorithmic Sequencer PCI Board23095 5083 GX5083 Dynamic Digital I/O with Algorithmic Sequencer PXI Board23106 5550 GX5050 Dynamic Digital I/O with Algorithmic Sequencer PXI Board