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Searched refs:Scl (Results 1 – 10 of 10) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA.td323 SchedWriteFMA.Scl>, VEX_LIG;
325 SchedWriteFMA.Scl>, VEX_LIG;
328 SchedWriteFMA.Scl>, VEX_LIG;
330 SchedWriteFMA.Scl>, VEX_LIG;
542 SchedWriteFMA.Scl>,
545 SchedWriteFMA.Scl>,
548 X86any_Fnmadd, loadf32, SchedWriteFMA.Scl>,
551 X86any_Fnmsub, loadf32, SchedWriteFMA.Scl>,
571 SchedWriteFMA.Scl>,
574 SchedWriteFMA.Scl>,
[all …]
H A DX86InstrAVX512.td5443 sched.PS.Scl>,
5448 sched.PD.Scl>,
5454 sched.PH.Scl>,
6844 EVEX, VVVV, Sched<[SchedWriteFMA.Scl.Folded, SchedWriteFMA.Scl.ReadAfterFold,
6863 [RHS_m]>, Sched<[SchedWriteFMA.Scl.Folded, SchedWriteFMA.Scl.ReadAfterFold,
9250 SchedWriteFRcp.Scl>;
9252 SchedWriteFRsqrt.Scl>;
9256 SchedWriteFRnd.Scl>,
9258 SchedWriteFRnd.Scl>;
12489 Sched<[SchedWriteFMA.Scl.Folded]>;
[all …]
H A DX86InstrXOP.td78 ssmem, sse_load_f32, SchedWriteFRnd.Scl>;
87 sdmem, sse_load_f64, SchedWriteFRnd.Scl>;
H A DX86Schedule.td82 X86FoldableSchedWrite Scl = sScl; // Scalar float/double operations.
118 X86SchedWriteMoveLS Scl = sScl; // Scalar float/double operations.
H A DX86InstrSSE.td1862 SchedWriteFCmpSizes.PS.Scl, sse_load_f32>,
1867 SchedWriteFCmpSizes.PD.Scl, sse_load_f64>,
1874 SchedWriteFCmpSizes.PS.Scl, sse_load_f32>, TB, XS;
1878 SchedWriteFCmpSizes.PD.Scl, sse_load_f64>, TB, XD;
2676 sched.PS.Scl>, TB, XS;
2679 sched.PD.Scl>, TB, XD;
2698 SSEPackedSingle, sched.PS.Scl>, TB, XS;
2701 SSEPackedDouble, sched.PD.Scl>, TB, XD;
5642 defm VROUND : avx_fp_unop_rm<0x0A, 0x0B, "vround", SchedWriteFRnd.Scl>,
5667 defm ROUND : sse41_fp_unop_s<0x0A, 0x0B, "round", SchedWriteFRnd.Scl>;
[all …]
H A DX86ISelLowering.cpp5874 if (X86::isZeroNode(Scl)) { in getFauxShuffleMask()
5889 Scl = Scl.getOperand(0); in getFauxShuffleMask()
5902 SrcExtract = Scl; in getFauxShuffleMask()
41983 SDValue Scl = Op.getOperand(1); in SimplifyDemandedBitsForTargetNode() local
43717 EVT SclVT = Scl.getValueType(); in combineExtractWithShuffle()
43719 Scl = DAG.getNode(ISD::SRL, dl, SclVT, Scl, in combineExtractWithShuffle()
43722 Scl = DAG.getZExtOrTrunc(Scl, dl, SrcVT.getScalarType()); in combineExtractWithShuffle()
43723 Scl = DAG.getZExtOrTrunc(Scl, dl, VT); in combineExtractWithShuffle()
43724 return Scl; in combineExtractWithShuffle()
44199 Scl = DAG.getNode(ISD::TRUNCATE, dl, SrcVT.getScalarType(), Scl); in combineExtractVectorElt()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp149 COFF::SymbolStorageClass Scl = in runOnMachineFunction() local
155 OutStreamer->emitCOFFSymbolStorageClass(Scl); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp157 COFF::SymbolStorageClass Scl = Internal ? COFF::IMAGE_SYM_CLASS_STATIC in runOnMachineFunction() local
162 OutStreamer->emitCOFFSymbolStorageClass(Scl); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1168 SDValue Scl = Op.getOperand(0); in SimplifyDemandedBits() local
1169 APInt DemandedSclBits = DemandedBits.zextOrTrunc(Scl.getValueSizeInBits()); in SimplifyDemandedBits()
1171 if (SimplifyDemandedBits(Scl, DemandedSclBits, KnownScl, TLO, Depth + 1)) in SimplifyDemandedBits()
1198 SDValue Scl = Op.getOperand(1); in SimplifyDemandedBits() local
1215 unsigned NumSclBits = Scl.getScalarValueSizeInBits(); in SimplifyDemandedBits()
1217 if (SimplifyDemandedBits(Scl, DemandedSclBits, KnownScl, TLO, Depth + 1)) in SimplifyDemandedBits()
3329 SDValue Scl = Op.getOperand(1); in SimplifyDemandedVectorElts() local
3345 KnownUndef.setBitVal(Idx, Scl.isUndef()); in SimplifyDemandedVectorElts()
3347 KnownZero.setBitVal(Idx, isNullConstant(Scl) || isNullFPConstant(Scl)); in SimplifyDemandedVectorElts()
H A DSelectionDAG.cpp2763 SDValue Scl; in isSplatValue() local
2772 if (Scl && Scl != Op) in isSplatValue()
2774 Scl = Op; in isSplatValue()