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Searched refs:Scheduler (Results 1 – 25 of 46) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DScheduler.cpp32 void Scheduler::dump() const { in dump()
40 Scheduler::Status Scheduler::isAvailable(const InstRef &IR) { in isAvailable()
47 return Scheduler::SC_BUFFERS_FULL; in isAvailable()
49 return Scheduler::SC_DISPATCH_GROUP_STALL; in isAvailable()
60 return Scheduler::SC_LOAD_QUEUE_FULL; in isAvailable()
62 return Scheduler::SC_STORE_QUEUE_FULL; in isAvailable()
64 return Scheduler::SC_AVAILABLE; in isAvailable()
70 void Scheduler::issueInstructionImpl( in issueInstructionImpl()
99 void Scheduler::issueInstruction( in issueInstruction()
192 InstRef Scheduler::select() { in select()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DPostRASchedulerList.cpp326 Scheduler.startBlock(&MBB); in runOnMachineFunction()
340 Scheduler.setEndIndex(CurrentCount); in runOnMachineFunction()
341 Scheduler.schedule(); in runOnMachineFunction()
342 Scheduler.exitRegion(); in runOnMachineFunction()
343 Scheduler.EmitSchedule(); in runOnMachineFunction()
356 Scheduler.setEndIndex(CurrentCount); in runOnMachineFunction()
357 Scheduler.schedule(); in runOnMachineFunction()
358 Scheduler.exitRegion(); in runOnMachineFunction()
359 Scheduler.EmitSchedule(); in runOnMachineFunction()
362 Scheduler.finishBlock(); in runOnMachineFunction()
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H A DMachineScheduler.cpp377 if (Scheduler) in createMachineScheduler()
378 return Scheduler; in createMachineScheduler()
390 if (Scheduler) in createPostMachineScheduler()
391 return Scheduler; in createPostMachineScheduler()
572 Scheduler.startBlock(&*MBB); in scheduleRegions()
611 Scheduler.exitRegion(); in scheduleRegions()
629 Scheduler.schedule(); in scheduleRegions()
632 Scheduler.exitRegion(); in scheduleRegions()
634 Scheduler.finishBlock(); in scheduleRegions()
639 Scheduler.fixupKills(*MBB); in scheduleRegions()
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DScheduler.h70 class Scheduler : public HardwareUnit {
157 Scheduler(const MCSchedModel &Model, LSUnitBase &Lsu) in Scheduler() function
158 : Scheduler(Model, Lsu, nullptr) {} in Scheduler()
160 Scheduler(const MCSchedModel &Model, LSUnitBase &Lsu, in Scheduler() function
162 : Scheduler(std::make_unique<ResourceManager>(Model), Lsu, in Scheduler()
165 Scheduler(std::unique_ptr<ResourceManager> RM, LSUnitBase &Lsu, in Scheduler() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DExecuteStage.cpp26 HWStallEvent::GenericEventType toHWStallEventType(Scheduler::Status Status) { in toHWStallEventType()
28 case Scheduler::SC_LOAD_QUEUE_FULL: in toHWStallEventType()
30 case Scheduler::SC_STORE_QUEUE_FULL: in toHWStallEventType()
32 case Scheduler::SC_BUFFERS_FULL: in toHWStallEventType()
34 case Scheduler::SC_DISPATCH_GROUP_STALL: in toHWStallEventType()
36 case Scheduler::SC_AVAILABLE: in toHWStallEventType()
44 if (Scheduler::Status S = HWS.isAvailable(IR)) { in isAvailable()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MCA/Stages/
H A DExecuteStage.h29 Scheduler &HWS;
50 ExecuteStage(Scheduler &S) : ExecuteStage(S, false) {} in ExecuteStage()
51 ExecuteStage(Scheduler &S, bool ShouldPerformBottleneckAnalysis) in ExecuteStage()
/freebsd-14.2/crypto/heimdal/appl/telnet/telnet/
H A Dauthenc.c68 if (Scheduler(0) == -1) in telnet_spin()
H A Dexterns.h184 int Scheduler(int);
H A Dtelnet.c1980 Scheduler(int block) /* should we block in the select ? */ in Scheduler() function
2146 while ((schedValue = Scheduler(0)) != 0) { in my_telnet()
2153 if (Scheduler(1) == -1) { in my_telnet()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/
H A DContext.cpp44 auto HWS = std::make_unique<Scheduler>(SM, *LSU); in createDefaultPipeline()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.cpp1737 SIScheduleBlockScheduler Scheduler(DAG, ScheduleVariant, Blocks); in scheduleVariant() local
1741 ScheduledBlocks = Scheduler.getBlocks(); in scheduleVariant()
1750 Res.MaxSGPRUsage = Scheduler.getSGPRUsage(); in scheduleVariant()
1751 Res.MaxVGPRUsage = Scheduler.getVGPRUsage(); in scheduleVariant()
1928 SIScheduler Scheduler(this); in schedule() local
1929 Best = Scheduler.scheduleVariant(SISchedulerBlockCreatorVariant::LatenciesAlone, in schedule()
1948 Temp = Scheduler.scheduleVariant(v.first, v.second); in schedule()
1969 Temp = Scheduler.scheduleVariant(v.first, v.second); in schedule()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiSchedule.td44 // Enable Post RegAlloc Scheduler pass. [default = 0]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZSchedule.td9 // Scheduler resources
/freebsd-14.2/sys/contrib/device-tree/Bindings/usb/
H A Dda8xx-usb.txt34 CPPI DMA Scheduler, Queue Manager
H A Dam33xx-usb.txt58 CPPI DMA Controller, USB CPPI DMA Scheduler, USB Queue Manager
/freebsd-14.2/contrib/file/magic/Magdir/
H A Dwordprocessors276 # Corel Scheduler
278 >>9 byte 2 Corel Scheduler help file
279 >>9 byte 10 Corel Scheduler in file
280 >>9 byte 11 Corel Scheduler out file
282 >>>9 byte x Corel Scheduler: Unknown filetype %d
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Schedule.td18 // AArch64 Scheduler Definitions
/freebsd-14.2/sys/contrib/device-tree/Bindings/soc/ti/
H A Dkeystone-navigator-dma.txt48 - Tx DMA channel Scheduler configuration register region (txsched).
/freebsd-14.2/contrib/telnet/telnet/
H A Dtelnet.c2058 Scheduler(int block) in Scheduler() function
2154 while ((schedValue = Scheduler(0)) != 0) { in telnet()
2161 if (Scheduler(1) == -1) { in telnet()
/freebsd-14.2/sys/contrib/openzfs/cmd/zpool_influxdb/
H A DREADME.md120 [ZFS documentation for ZIO Scheduler]
121 (https://openzfs.github.io/openzfs-docs/Performance%20and%20Tuning/ZIO%20Scheduler.html)
/freebsd-14.2/contrib/wpa/wpa_supplicant/
H A DREADME-Windows.txt151 description: Atheros Wireless Network Adapter (Microsoft's Packet Scheduler)
154 description: Intel 8255x-based Integrated Fast Ethernet (Microsoft's Packet Scheduler)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleBdVer2.td29 let PostRAScheduler = 1; // Enable Post RegAlloc Scheduler pass.
95 // There is one Integer Scheduler per core.
100 // Unified Integer, Memory Scheduler has 40 entries.
117 // Unified FP Scheduler has 64 entries,
H A DX86ScheduleBtVer2.td72 // Integer Pipe Scheduler
77 // AGU Pipe Scheduler
82 // Fpu Pipe Scheduler
/freebsd-14.2/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_itt.inl919 name ("OMP Scheduler") for the object to let ITT know it is an object used
925 __itt_sync_create(object, "OMP Scheduler", name, 0);
926 KMP_ITT_DEBUG_PRINT("[sys obj] scre( %p, \"OMP Scheduler\", \"%s\", 0 )\n",
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp998 ScheduleDAGSDNodes *Scheduler = CreateScheduler(); in CodeGenAndEmitDAG() local
1002 Scheduler->Run(CurDAG, FuncInfo->MBB); in CodeGenAndEmitDAG()
1006 Scheduler->viewGraph(); in CodeGenAndEmitDAG()
1017 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt); in CodeGenAndEmitDAG()
1029 delete Scheduler; in CodeGenAndEmitDAG()

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