| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetSchedule.h | 33 MCSchedModel SchedModel; variable
49 TargetSchedModel() : SchedModel(MCSchedModel::Default) {} in TargetSchedModel()
74 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } in getMCSchedModel()
95 unsigned getProcessorID() const { return SchedModel.getProcessorID(); } in getProcessorID()
98 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
113 return SchedModel.getNumProcResourceKinds(); in getNumProcResourceKinds()
118 return SchedModel.getProcResource(PIdx); in getProcResource()
125 return SchedModel.getProcResource(PIdx)->Name; in getResourceName()
160 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } in getMicroOpBufferSize()
165 return SchedModel.getProcResource(PIdx)->BufferSize; in getResourceBufferSize()
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| H A D | VLIWMachineScheduler.h | 40 const TargetSchedModel *SchedModel; variable
129 const TargetSchedModel *SchedModel = nullptr; member
160 SchedModel = smodel; in init()
169 CriticalPathLength = BBSize / SchedModel->getIssueWidth(); in init()
212 const TargetSchedModel *SchedModel = nullptr; variable
246 const TargetSchedModel *SchedModel) const;
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| H A D | ScheduleDAGInstrs.h | 127 TargetSchedModel SchedModel; variable
264 const TargetSchedModel *getSchedModel() const { return &SchedModel; } in getSchedModel()
268 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) in getSchedClass()
269 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); in getSchedClass()
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| H A D | MachineScheduler.h | 611 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
842 const TargetSchedModel *SchedModel = nullptr; variable
988 return RetiredMOps * SchedModel->getMicroOpFactor(); in getCriticalCount()
996 return std::max(CurrCycle * SchedModel->getLatencyFactor(), in getExecutedCount()
1019 return SchedModel->getProcResource(PIdx)->SubUnitsIdxBegin && in isUnbufferedGroup()
1020 !SchedModel->getProcResource(PIdx)->BufferSize; in isUnbufferedGroup()
1162 const TargetSchedModel *SchedModel);
1167 const TargetSchedModel *SchedModel = nullptr; variable
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| H A D | MachineTraceMetrics.h | 102 TargetSchedModel SchedModel; variable
418 unsigned Factor = SchedModel.getLatencyFactor(); in getCycles()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 44 return EnableSchedModel && SchedModel.hasInstrSchedModel(); in hasInstrSchedModel()
53 SchedModel = TSInfo->getSchedModel(); in init()
57 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init()
59 ResourceLCM = SchedModel.IssueWidth; in init()
65 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
135 SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
227 SchedModel.isComplete()) { in computeOperandLatency()
270 return TII->defaultDefLatency(SchedModel, *MI); in computeInstrLatency()
276 if (!SchedModel.isOutOfOrder()) in computeOutputLatency()
340 return SchedModel.getReciprocalThroughput(*STI, *TII, MI); in computeReciprocalThroughput()
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| H A D | MachineScheduler.cpp | 2266 SchedModel = smodel; in init()
2312 if (SchedModel && SchedModel->enableIntervals()) { in getNextResourceCycleByInstance()
2722 if (SchedModel && SchedModel->enableIntervals()) { in bumpNode()
2888 if (SchedModel && SchedModel->enableIntervals()) { in dumpReservedCycles()
3211 SchedModel = DAG->getSchedModel(); in initialize()
3217 Rem.init(DAG, SchedModel); in initialize()
3218 Top.init(DAG, SchedModel, &Rem); in initialize()
3219 Bot.init(DAG, SchedModel, &Rem); in initialize()
3323 SchedModel->getMicroOpBufferSize() * SchedModel->getMicroOpFactor(); in checkAcyclicLatency()
3827 Rem.init(DAG, SchedModel); in initialize()
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| H A D | MachineTraceMetrics.cpp | 72 SchedModel.init(&ST); in runOnMachineFunction()
108 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getResources()
119 if (!SchedModel.hasInstrSchedModel()) in getResources()
126 PI = SchedModel.getWriteProcResBegin(SC), in getResources()
138 PRCycles[K] * SchedModel.getResourceFactor(K); in getResources()
147 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getProcReleaseAtCycles()
159 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in Ensemble()
177 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in computeDepthResources()
816 DepCycle += MTM.SchedModel in updateDepth()
1222 if (unsigned IW = TE.MTM.SchedModel.getIssueWidth()) in getResourceDepth()
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| H A D | VLIWMachineScheduler.cpp | 67 : TII(STI.getInstrInfo()), SchedModel(SM) { in VLIWResourceModel()
74 Packet.reserve(SchedModel->getIssueWidth()); in VLIWResourceModel()
156 Packet.size() >= SchedModel->getIssueWidth()) { in reserveResources()
272 SchedModel = DAG->getSchedModel(); in initialize()
274 Top.init(DAG, SchedModel); in initialize()
275 Bot.init(DAG, SchedModel); in initialize()
307 return new VLIWResourceModel(STI, SchedModel); in createVLIWResourceModel()
365 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
366 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
388 unsigned Width = SchedModel->getIssueWidth(); in bumpCycle()
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| H A D | ScheduleDAGInstrs.cpp | 123 SchedModel.init(&ST); in ScheduleDAGInstrs()
280 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, in addPhysRegDataDeps()
324 SchedModel.computeOutputLatency(MI, OperIdx, DefInstr)); in addPhysRegDeps()
454 Dep.setLatency(SchedModel.computeOperandLatency(MI, OperIdx, Use, in addVRegDefDeps()
498 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
592 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
602 if (SchedModel.hasInstrSchedModel()) { in initSUnits()
605 make_range(SchedModel.getWriteProcResBegin(SC), in initSUnits()
606 SchedModel.getWriteProcResEnd(SC))) { in initSUnits()
607 switch (SchedModel.getProcResource(PRE.ProcResourceIdx)->BufferSize) { in initSUnits()
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| H A D | EarlyIfConversion.cpp | 765 MCSchedModel SchedModel; member in __anone8860c9c0311::EarlyIfConverter
916 unsigned CritLimit = SchedModel.MispredictPenalty/2; in shouldConvertIf()
1090 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
1119 TargetSchedModel SchedModel; member in __anone8860c9c0b11::EarlyIfPredicator
1171 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1185 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1191 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1225 SchedModel.init(&STI); in runOnMachineFunction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZHazardRecognizer.cpp | 176 PI = SchedModel->getWriteProcResBegin(SC), in dumpSU()
177 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in dumpSU()
179 *SchedModel->getProcResource(PI->ProcResourceIdx); in dumpSU()
238 dbgs() << SchedModel->getProcResource(i)->Name in dumpProcResourceCounters()
244 << SchedModel->getProcResource(CriticalResourceIdx)->Name in dumpProcResourceCounters()
297 PI = SchedModel->getWriteProcResBegin(SC), in EmitInstruction()
298 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in EmitInstruction()
401 PI = SchedModel->getWriteProcResBegin(SC), in resourcesCost()
418 const MCSchedClassDesc *SC = SchedModel->resolveSchedClass(MI); in emitInstruction()
420 make_range(SchedModel->getWriteProcResBegin(SC), in emitInstruction()
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| H A D | SystemZHazardRecognizer.h | 48 const TargetSchedModel *SchedModel; variable
112 : TII(tii), SchedModel(SM) { in SystemZHazardRecognizer()
122 if (!SU->SchedClass && SchedModel->hasInstrSchedModel()) in getSchedClass()
123 SU->SchedClass = SchedModel->resolveSchedClass(SU->getInstr()); in getSchedClass()
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| H A D | SystemZMachineScheduler.cpp | 88 HazardRec = SchedStates[MBB] = new SystemZHazardRecognizer(TII, &SchedModel); in enterMBB()
135 SchedModel.init(ST); in SystemZPostRASchedStrategy()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SISchedule.td | 202 let SchedModel = SIFullSpeedModel in {
218 } // End SchedModel = SIFullSpeedModel
220 let SchedModel = SIQuarterSpeedModel in {
242 let SchedModel = SIDPFullSpeedModel in {
264 } // End SchedModel = SIDPFullSpeedModel
300 let SchedModel = GFX10SpeedModel in {
331 } // End SchedModel = GFX10SpeedModel
333 let SchedModel = GFX11SpeedModel in {
364 } // End SchedModel = GFX11SpeedModel
366 let SchedModel = GFX12SpeedModel in {
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| H A D | AMDGPUInsertDelayAlu.cpp | 33 TargetSchedModel SchedModel; member in __anon707abc8d0111::AMDGPUInsertDelayAlu
390 unsigned Latency = SchedModel.computeOperandLatency( in runOnMachineBasicBlock()
433 SchedModel.init(&ST); in runOnMachineFunction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StorePairSuppress.cpp | 35 TargetSchedModel SchedModel; member in __anon5d7827fb0111::AArch64StorePairSuppress
88 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
133 SchedModel.init(&ST); in runOnMachineFunction()
139 if (!SchedModel.hasInstrSchedModel()) { in runOnMachineFunction()
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| H A D | AArch64SIMDInstrOpt.cpp | 72 TargetSchedModel SchedModel; member
223 std::string Subtarget = std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldReplaceInst()
231 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst()
243 SCDescRepl = SchedModel.getMCSchedModel()->getSchedClassDesc( in shouldReplaceInst()
255 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode()); in shouldReplaceInst()
257 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
294 std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldExitEarly()
706 SchedModel.init(&ST); in runOnMachineFunction()
707 if (!SchedModel.hasInstrSchedModel()) in runOnMachineFunction()
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| H A D | AArch64SchedKryo.td | 41 let SchedModel = KryoModel in {
60 let SchedModel = KryoModel in {
141 } // SchedModel = KryoModel
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| H A D | AArch64Schedule.td | 10 // const MachineInstr *MI and const TargetSchedModel *SchedModel
14 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSchedule.td | 192 SchedMachineModel SchedModel = ?;
207 SchedMachineModel SchedModel = ?;
249 SchedMachineModel SchedModel = ?;
279 SchedMachineModel SchedModel = ?;
335 SchedMachineModel SchedModel = ?;
376 SchedMachineModel SchedModel = ?;
386 SchedMachineModel SchedModel = ?;
413 SchedMachineModel SchedModel = ?;
443 SchedMachineModel SchedModel = ?;
456 SchedMachineModel SchedModel = ?;
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 112 MCSchedModel SchedModel =
123 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F), in InstrItineraryData()
124 Itineraries(SchedModel.InstrItineraries) {} in InstrItineraryData()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonMachineScheduler.cpp | 41 const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const { in createVLIWResourceModel()
42 return new HexagonVLIWResourceModel(STI, SchedModel); in createVLIWResourceModel()
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| H A D | HexagonMachineScheduler.h | 35 const TargetSchedModel *SchedModel) const override;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 324 assert(CPUEntry->SchedModel && "Missing processor SchedModel value"); in getSchedModelForCPU()
325 return *CPUEntry->SchedModel; in getSchedModelForCPU()
330 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
331 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU()
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