| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 401 STRICT_FSUB, enumerator
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 268 case ISD::STRICT_FSUB: return "strict_fsub"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 2681 Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::f64, MVT::Other}, in ExpandLegalINT_TO_FP()
4269 case ISD::STRICT_FSUB: { in ExpandNode()
4271 ISD::STRICT_FSUB, Node->getValueType(0)) == TargetLowering::Legal) in ExpandNode()
4793 case ISD::STRICT_FSUB: in ConvertNodeToLibcall()
5270 case ISD::STRICT_FSUB: in PromoteNode()
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| H A D | LegalizeFloatTypes.cpp | 133 case ISD::STRICT_FSUB: in SoftenFloatResult()
1354 case ISD::STRICT_FSUB: in ExpandFloatResult()
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| H A D | LegalizeVectorOps.cpp | 723 case ISD::STRICT_FSUB: in Promote()
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| H A D | TargetLowering.cpp | 8140 Node->isStrictFPOpcode() ? ISD::STRICT_FSUB : ISD::FSUB, SrcVT)) in expandFP_TO_UINT()
8174 SDValue Val = DAG.getNode(ISD::STRICT_FSUB, dl, { SrcVT, MVT::Other }, in expandFP_TO_UINT()
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| H A D | DAGCombiner.cpp | 16434 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
16437 return DAG.getNode(ISD::STRICT_FSUB, DL, DAG.getVTList(VT, ChainVT), in visitSTRICT_FADD()
16442 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
16445 return DAG.getNode(ISD::STRICT_FSUB, DL, DAG.getVTList(VT, ChainVT), in visitSTRICT_FADD()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 351 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in PPCTargetLowering()
357 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in PPCTargetLowering()
1139 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in PPCTargetLowering()
1153 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in PPCTargetLowering()
1237 setOperationAction(ISD::STRICT_FSUB, MVT::f128, Legal); in PPCTargetLowering()
8366 SDValue Val = DAG.getNode(ISD::STRICT_FSUB, dl, in LowerFP_TO_INT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 425 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in RISCVTargetLowering()
449 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in RISCVTargetLowering()
919 ISD::FMINIMUM, ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in RISCVTargetLowering()
999 setOperationAction({ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in RISCVTargetLowering()
1318 {ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in RISCVTargetLowering()
5596 OP_CASE(STRICT_FSUB) in getRISCVVLOp()
6609 case ISD::STRICT_FSUB: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 634 setOperationAction(ISD::STRICT_FSUB, MVT::f16, Promote); in X86TargetLowering()
747 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in X86TargetLowering()
748 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in X86TargetLowering()
801 setOperationAction(ISD::STRICT_FSUB , MVT::f80, Legal); in X86TargetLowering()
826 setOperationAction(ISD::STRICT_FSUB, MVT::f128, LibCall); in X86TargetLowering()
998 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in X86TargetLowering()
1238 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in X86TargetLowering()
1415 setOperationAction(ISD::STRICT_FSUB, MVT::v8f32, Legal); in X86TargetLowering()
1754 setOperationAction(ISD::STRICT_FSUB, MVT::v16f32, Legal); in X86TargetLowering()
1755 setOperationAction(ISD::STRICT_FSUB, MVT::v8f64, Legal); in X86TargetLowering()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 525 setOperationAction(ISD::STRICT_FSUB, VT, Legal); in SystemZTargetLowering()
574 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in SystemZTargetLowering()
640 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 547 def strict_fsub : SDNode<"ISD::STRICT_FSUB",
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 705 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in AArch64TargetLowering()
785 for (auto Op : {ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in AArch64TargetLowering()
1088 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in AArch64TargetLowering()
1749 ISD::STRICT_FMAXNUM, ISD::STRICT_FADD, ISD::STRICT_FSUB, in addTypeForNEON()
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