| /freebsd-14.2/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | brcm,brcmstb-waketimer.txt | 1 Broadcom STB wake-up Timer
3 The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
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| H A D | brcm,brcmstb-waketimer.yaml | 7 title: Broadcom STB wake-up Timer
13 The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/reset/ |
| H A D | brcm,brcmstb-reset.txt | 1 Broadcom STB SW_INIT-style reset controller
4 Broadcom STB SoCs have a SW_INIT-style reset controller with separate
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| H A D | brcm,brcmstb-reset.yaml | 7 title: Broadcom STB SW_INIT-style reset controller
10 Broadcom STB SoCs have a SW_INIT-style reset controller with separate
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/usb/ |
| H A D | hisilicon,histb-xhci.txt | 1 HiSilicon STB xHCI
3 The device node for HiSilicon STB xHCI host controller
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| H A D | brcm,bdc.txt | 14 On Broadcom STB platforms, these properties are required:
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| H A D | brcm,bcm7445-ehci.yaml | 7 title: Broadcom STB USB EHCI Controller
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| H A D | generic-xhci.yaml | 28 - description: Broadcom STB SoCs with xHCI
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| H A D | usb-xhci.txt | 10 - "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/pci/ |
| H A D | hisilicon-histb-pcie.txt | 1 HiSilicon STB PCIe host bridge DT description
3 The HiSilicon STB PCIe host controller is based on the DesignWare PCIe core.
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| /freebsd-14.2/sys/contrib/device-tree/src/arm64/synaptics/ |
| H A D | berlin4ct-stb.dts | 13 model = "Marvell BG4CT STB board";
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| /freebsd-14.2/sys/contrib/device-tree/src/arm/ |
| H A D | bcm7445-bcm97445svmb.dts | 6 model = "Broadcom STB (bcm7445), SVMB reference board";
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/thermal/ |
| H A D | brcm,avs-tmon.txt | 1 * Broadcom STB thermal management
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| H A D | brcm,avs-tmon.yaml | 7 title: Broadcom STB thermal management
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| /freebsd-14.2/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | PPCInsns.def | 18 PCREL_OPT(STB, PSTB, OPC_AND_RST);
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | brcm,dpfe-cpu.yaml | 7 title: DDR PHY Front End (DPFE) for Broadcom STB
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| H A D | brcm,dpfe-cpu.txt | 1 DDR PHY Front End (DPFE) for Broadcom STB
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| H A D | brcm,brcmstb-memc-ddr.yaml | 7 title: Memory controller (MEMC) for Broadcom STB
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,brcmstb.txt | 1 ARM Broadcom STB platforms Device Tree Bindings
13 model = "Broadcom STB (bcm7445)";
146 A Broadcom STB SoC typically has a number of independent memory controllers,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 58 StOpc = BPF::STB; in expandMEMCPY()
108 BuildMI(*BB, MI, dl, get(BPF::STB)) in expandMEMCPY()
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/mips/brcm/ |
| H A D | soc.txt | 43 A Broadcom STB SoC typically has a number of independent memory controllers,
147 The Broadcom STB chips contain a timer block with several general purpose
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | brcm,brcmstb-i2c.yaml | 7 title: Broadcom STB BSC IIC Master Controller
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | brcm,brcmnand.yaml | 7 title: Broadcom STB NAND Controller
20 This controller was originally designed for STB SoCs (BCM7xxx) but is now
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-hi3798cv200-combphy.txt | 1 HiSilicon STB PCIE/SATA/USB3 PHY
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | brcm,brcmstb-gpio.yaml | 7 title: Broadcom STB "UPG GIO" GPIO controller
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