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Searched refs:SSTAT0 (Results 1 – 8 of 8) sorted by relevance

/freebsd-14.2/sys/dev/aic7xxx/
H A Daic7xxx.seq91 test SSTAT0, SELDO|SELDI jnz selection;
176 test SSTAT0, SELDI|SELDO jz bus_free_sel;
177 test SSTAT0,SELDO jnz select_out;
327 test SSTAT0, SPIORDY jz .;
423 test SSTAT0, SPIORDY jz .;
584 test SSTAT0, SPIORDY jz .;
1102 test SSTAT0, TARGET jz dma_last_sg;
1116 test SSTAT0,DMADONE jnz dma_dmadone;
1444 test SSTAT0, SDONE jnz . + 2;
2032 test SSTAT0, SPIORDY jz .;
[all …]
H A Daic79xx.seq80 test SSTAT0, SELDO|SELINGO jnz idle_loop_checkbus;
110 test SSTAT0, SELDO jnz select_out;
113 test SSTAT0, SELDO jnz select_out;
115 test SSTAT0, SELDI jnz select_in;
160 test SSTAT0, SELDO|SELINGO jnz . + 2;
1220 test SSTAT0, SELDO|SELINGO jnz . + 2;
1736 test SSTAT0, TARGET jnz data_phase_done;
2201 test SSTAT0, SELDO jnz return;
H A Daic7xxx.reg217 * the data has been safely transferred. SDONE in SSTAT0 is
259 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0.
277 register SSTAT0 {
H A Daic79xx.c1492 && (ahd_inb(ahd, SSTAT0) & SELDO) == 0 in ahd_handle_seqint()
1545 status0 = ahd_inb(ahd, SSTAT0) & (IOERR|OVERRUN|SELDI|SELDO); in ahd_handle_scsiint()
1737 && (ahd_inb(ahd, SSTAT0) & SELDI) == 0 in ahd_handle_scsiint()
1738 && ((ahd_inb(ahd, SSTAT0) & SELDO) == 0 in ahd_handle_scsiint()
3433 && (ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) == 0) in ahd_update_pending_scbs()
3467 if (ahd_inb(ahd, SSTAT0) & TARGET) in ahd_fetch_devinfo()
7131 || (ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) != 0)); in ahd_pause_and_flushwork()
9003 ahd_sstat0_print(ahd_inb(ahd, SSTAT0), &cur_col, 50); in ahd_dump_card_state()
H A Daic7xxx.c988 status0 = ahc_inb(ahc, SSTAT0) & IOERR; in ahc_handle_scsiint()
2182 if (ahc_inb(ahc, SSTAT0) & TARGET) in ahc_fetch_devinfo()
5187 || (ahc_inb(ahc, SSTAT0) & (SELDO|SELINGO)) != 0)); in ahc_pause_and_flushwork()
6752 ahc_sstat0_print(ahc_inb(ahc, SSTAT0), &cur_col, 50); in ahc_dump_card_state()
7125 && (ahc_inb(ahc, SSTAT0) & TARGET) != 0) { in ahc_recover_commands()
H A Daic7xxx_reg.h1144 #define SSTAT0 0x0b macro
H A Daic79xx.reg1811 register SSTAT0 {
1827 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0.
H A Daic79xx_reg.h2755 #define SSTAT0 0x4b macro