Searched refs:SRL_PRED (Results 1 – 4 of 4) sorted by relevance
121 SRL_PRED, enumerator
4291 N1.getOpcode() != AArch64ISD::SRL_PRED) in trySelectXAR()4294 N1.getOpcode() != AArch64ISD::SRL_PRED) in trySelectXAR()
2386 MAKE_CASE(AArch64ISD::SRL_PRED) in getTargetNodeName()12760 SecondOpc == AArch64ISD::SRL_PRED)) { in tryLowerToSLI()12767 FirstOpc == AArch64ISD::SRL_PRED)) { in tryLowerToSLI()12775 Shift.getOpcode() == AArch64ISD::SRL_PRED; in tryLowerToSLI()12777 Shift.getOpcode() == AArch64ISD::SRL_PRED; in tryLowerToSLI()13875 : AArch64ISD::SRL_PRED; in LowerVectorSRA_SRL_SHL()20114 return DAG.getNode(AArch64ISD::SRL_PRED, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
195 def AArch64lsr_p : SDNode<"AArch64ISD::SRL_PRED", SDT_AArch64Arith>;