Searched refs:SDWA (Results 1 – 17 of 17) sorted by relevance
113 using namespace AMDGPU::SDWA;368 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()375 if (DstSel == AMDGPU::SDWA::SdwaSel::WORD_1 && in convertToSDWA()376 getSrcSel() == AMDGPU::SDWA::SdwaSel::WORD_0) { in convertToSDWA()440 getDstSel() != AMDGPU::SDWA::DWORD) { in convertToSDWA()1071 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()1081 SDWAInst.addImm(AMDGPU::SDWA::DstUnused::UNUSED_PAD); in convertToSDWA()1091 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()1101 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()1108 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
38 SDWA = 2, enumerator75 SDWA = 1 << 14, enumerator315 SDWA = 2, enumerator877 namespace SDWA {
498 def SDWA {536 // GFX9 adds two features to SDWA:537 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.549 // gfx9 SDWA basic encoding569 // gfx9 SDWA-A582 // gfx9 SDWA-B609 let SDWA = 1;620 let DecoderNamespace = "SDWA";627 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA> {630 let SDWA = 1;[all …]
435 "Support SDWA (Sub-DWORD Addressing) extension"441 "Support OMod with SDWA (Sub-DWORD Addressing) extension"447 "Support scalar register with SDWA (Sub-DWORD Addressing) extension"453 "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"459 "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"465 "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"1544 string SDWA = "SDWA";1568 let Name = AMDGPUAsmVariants.SDWA;
34 field bit SDWA = 0;184 let TSFlags{14} = SDWA;261 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
26 int SDWA = 2;1480 // instructions with SDWA extension1888 // Ins for SDWA1941 // Outs for SDWA2171 0, // NumSrcArgs == 3 - No SDWA for VOP32203 // Function that checks if instruction supports DPP and SDWA2682 // Maps ordinary instructions to their SDWA counterparts2688 let ValueCols = [["SDWA"]];2691 // Maps SDWA instructions to their ordinary counterparts2696 let KeyCol = ["SDWA"];[all …]
513 return MI.getDesc().TSFlags & SIInstrFlags::SDWA; in isSDWA()517 return get(Opcode).TSFlags & SIInstrFlags::SDWA; in isSDWA()
1018 .addImm(DstLow ? AMDGPU::SDWA::SdwaSel::WORD_0 in copyPhysReg()1019 : AMDGPU::SDWA::SdwaSel::WORD_1) in copyPhysReg()1020 .addImm(AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) in copyPhysReg()1021 .addImm(SrcLow ? AMDGPU::SDWA::SdwaSel::WORD_0 in copyPhysReg()1022 : AMDGPU::SDWA::SdwaSel::WORD_1) in copyPhysReg()4723 DstUnused->getImm() == AMDGPU::SDWA::UNUSED_PRESERVE) { in verifyInstruction()9118 if (get(Opcode).TSFlags & SIInstrFlags::SDWA) { in pseudoToMCOpcode()9121 Gen = SIEncodingFamily::SDWA; in pseudoToMCOpcode()
121 // We only want to set this on the basic, non-SDWA or DPP forms.628 (inst_sdwa 0, $src, 0, 0, SDWA.WORD_1),
2302 .addImm(AMDGPU::SDWA::WORD_1) // $dst_sel in selectG_TRUNC()2303 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused in selectG_TRUNC()2304 .addImm(AMDGPU::SDWA::WORD_0) // $src0_sel in selectG_TRUNC()
920 if (DstSel->getImm() == AMDGPU::SDWA::DWORD) in checkVALUHazards()
1314 // (they do not support SDWA or DPP).
890 // SDWA sext is the only modifier allowed.
448 using namespace AMDGPU::SDWA; in getSDWASrcEncoding()478 using namespace AMDGPU::SDWA; in getSDWAVopcDstEncoding()
392 else if (Flags & SIInstrFlags::SDWA) in printVOPDst()1127 using namespace llvm::AMDGPU::SDWA; in printSDWASel()1166 using namespace llvm::AMDGPU::SDWA; in printSDWADstUnused()
3324 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) ) in checkTargetMatchPredicate()3338 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) { in checkTargetMatchPredicate()3349 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, in getAllVariants()3373 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA, in getMatchedVariants()3554 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | SIInstrFlags::SDWA)) && in validateConstantBusLimitations()3888 if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc)) in validateMovrels()4175 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()4189 if (IsRevOpcode(Opcode) || (Desc.TSFlags & SIInstrFlags::SDWA)) in validateLdsDirect()9029 using namespace llvm::AMDGPU::SDWA; in parseSDWASel()9058 using namespace llvm::AMDGPU::SDWA; in parseSDWADstUnused()[all …]
1729 using namespace AMDGPU::SDWA; in decodeSDWASrc()1777 using namespace AMDGPU::SDWA; in decodeSDWAVopcDst()