| /freebsd-14.2/sys/contrib/device-tree/Bindings/ata/ |
| H A D | nvidia,tegra124-ahci.txt | 1 Tegra SoC SATA AHCI controller
9 - AHCI register set (SATA BAR5)
10 - SATA register set
11 - interrupts : Defines the interrupt used by SATA
27 - sata-phy : XUSB PADCTL SATA PHY
29 - hvdd-supply : Defines the SATA HVDD regulator
30 - vddio-supply : Defines the SATA VDDIO regulator
31 - avdd-supply : Defines the SATA AVDD regulator
32 - target-5v-supply : Defines the SATA 5V power regulator
33 - target-12v-supply : Defines the SATA 12V power regulator
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| H A D | sata-common.yaml | 7 title: Common Properties for Serial AT attachment (SATA) controllers
14 AT attachment (SATA) storage devices. It doesn't constitute a device tree
18 The SATA controller-specific device tree bindings are responsible for
25 Specifies the host controller node. SATA host controller nodes are named
40 DT nodes for ports connected on the SATA host. The SATA port
53 The ID number of the SATA port. Aside with being directly used,
55 access more than one drive by means of a single SATA port.
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| H A D | nvidia,tegra-ahci.yaml | 7 title: Tegra AHCI SATA Controller
25 - description: SATA configuration and IPFS registers
26 - description: SATA AUX registers
73 description: SATA HVDD regulator supply.
76 description: SATA VDDIO regulator supply.
79 description: SATA AVDD regulator supply.
82 description: SATA 5V power regulator supply.
85 description: SATA 12V power regulator supply.
165 <0x70020000 0x00007000>, /* SATA */
166 <0x70001100 0x00010000>; /* SATA AUX */
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| H A D | imx-sata.txt | 1 * Freescale i.MX AHCI SATA Controller
3 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
8 - "fsl,imx53-ahci" for i.MX53 SATA controller
9 - "fsl,imx6q-ahci" for i.MX6Q SATA controller
10 - "fsl,imx6qp-ahci" for i.MX6QP SATA controller
11 - interrupts : interrupt mapping for SATA IRQ
24 - fsl,no-spread-spectrum : disable spread-spectrum clocking on the SATA
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| H A D | ahci-platform.txt | 1 * AHCI SATA Controller
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
21 - interrupts : <interrupt mapping for SATA IRQ>
32 - target-supply : regulator for SATA target power
34 - phys : reference to the SATA PHY node
49 - phys : reference to the SATA PHY node
50 - target-supply : regulator for SATA target power
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| H A D | exynos-sata.txt | 1 * Samsung AHCI SATA Controller
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
8 - interrupts : <interrupt mapping for SATA IRQ>
17 - clock-names : Shall be "sata" for the external SATA bus clock,
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| H A D | cortina,gemini-sata-bridge.txt | 1 * Cortina Systems Gemini SATA Bridge
3 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
5 them in different configurations to two SATA ports.
11 - resets: phandles to the reset lines for both SATA bridges
17 the ATA controller and SATA bridges. Values 0..3:
37 - cortina,gemini-enable-sata-bridge: enables the PATA to SATA bridge
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| H A D | qcom-sata.txt | 1 * Qualcomm AHCI SATA Controller
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
8 - interrupts : <interrupt mapping for SATA IRQ>
17 "slave_iface" - Fabric port AHB clock for SATA
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| H A D | cortina,gemini-sata-bridge.yaml | 7 title: Cortina Systems Gemini SATA Bridge
13 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
15 them in different configurations to two SATA ports.
26 description: phandles to the reset lines for both SATA bridges
54 Tell the desired multiplexing mode for the ATA controller and SATA
77 description: Enables the PATA to SATA bridge inside the Gemnini SoC.
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| H A D | fsl-sata.txt | 1 * Freescale 8xxx/3.0 Gb/s SATA nodes
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA port should have its own node.
11 - interrupts : <interrupt mapping for SATA IRQ>
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| H A D | ahci-common.yaml | 14 This document defines device tree properties for a common AHCI SATA
49 description: Power regulator for SATA target device
52 description: Power regulator for SATA PHY
55 description: Reference to the SATA PHY node
95 AHCI SATA port identifier. By design AHCI controller can't have
102 description: Individual AHCI SATA port PHY
106 description: AHCI SATA port PHY ID
110 description: Power regulator for SATA port target device
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| H A D | ahci-st.txt | 1 STMicroelectronics STi SATA controller
3 This binding describes a SATA device.
8 - interrupts : Interrupt associated with the SATA device
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
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| H A D | baikal,bt1-ahci.yaml | 7 title: Baikal-T1 SoC AHCI SATA controller
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
27 - description: SATA Ports reference clock
38 - description: SATA Ports clock domain reset
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| H A D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
4 controllers. Each SATA controller (pair of ports) have its own node.
19 - interrupts : Interrupt-specifier for SATA host controller IRQ.
24 * "sata-phy" for the SATA 6.0Gbps PHY
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| H A D | snps,dwc-ahci.yaml | 7 title: Synopsys DWC AHCI SATA controller
14 implementation of the AHCI SATA controller.
22 - description: Synopsys AHCI SATA-compatible devices
24 - description: SPEAr1340 AHCI SATA device
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| H A D | brcm,sata-brcm.txt | 3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
16 - interrupts : interrupt mapping for SATA IRQ
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| H A D | snps,dwc-ahci-common.yaml | 7 title: Synopsys DWC AHCI SATA controller properties
30 Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock,
51 - description: SATA Ports reference clock
57 normally supported by the DWC AHCI SATA controller.
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| H A D | marvell.txt | 1 * Marvell Orion SATA
7 - nr-ports : Number of SATA ports in use.
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| H A D | imx-sata.yaml | 7 title: Freescale i.MX AHCI SATA Controller
13 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
59 description: if present, disable spread-spectrum clocking on the SATA link.
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/phy/ |
| H A D | qcom-ipq806x-sata-phy.txt | 1 Qualcomm IPQ806x SATA PHY Controller
4 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
5 Each SATA PHY controller should have its own node.
9 - reg: offset and length of the SATA PHY register set;
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| H A D | qcom-apq8064-sata-phy.txt | 1 Qualcomm APQ8064 SATA PHY Controller
4 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
5 Each SATA PHY controller should have its own node.
9 - reg: offset and length of the SATA PHY register set;
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| H A D | calxeda-combophy.yaml | 7 title: Calxeda Highbank Combination PHYs for SATA
11 and to SATA connectors. The PHYs support multiple protocols (SATA,
12 SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
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| H A D | phy-mvebu.txt | 1 * Marvell MVEBU SATA PHY
3 Power control for the SATA phy found on Marvell MVEBU SoCs.
9 - reg : Offset and length of the register set for the SATA device
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| H A D | phy-miphy365x.txt | 5 for SATA and PCIe.
29 - sata: For SATA devices
33 - st,sata-gen : Generation of locally attached SATA IP. Expected values
37 - st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/clock/ |
| H A D | mvebu-gated-clock.txt | 20 15 sata0 SATA Host 0
25 30 sata1 SATA Host 0
37 14 sata0_link SATA 0 Link
70 15 sata0 SATA 0
79 30 sata1 SATA 1
90 15 sata0 SATA 0
109 15 sata0 SATA Host 0
120 30 sata1 SATA Host 1
138 3 sata SATA Host
167 14 sata0 SATA Host 0
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