| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 323 SADDO, enumerator
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| H A D | SelectionDAGNodes.h | 3188 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
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| H A D | TargetLowering.h | 2783 case ISD::SADDO: in isCommutativeBinOp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 101 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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| H A D | SystemZOperators.td | 289 def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>;
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| H A D | SystemZISelDAGToDAG.cpp | 1395 case SystemZISD::SADDO: in tryFoldLoadStoreIntoMemOperand()
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| H A D | SystemZISelLowering.cpp | 186 setOperationAction(ISD::SADDO, VT, Custom); in SystemZTargetLowering()
4285 case ISD::SADDO: in lowerXALUO()
4286 BaseOp = SystemZISD::SADDO; in lowerXALUO()
6137 case ISD::SADDO: in LowerOperation()
6335 OPCODE(SADDO); in getTargetNodeName()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 116 setOperationAction(ISD::SADDO, VT, Custom); in M68kTargetLowering()
1381 case ISD::SADDO: in LowerOperation()
1538 case ISD::SADDO: in isOverflowArithmetic()
1577 case ISD::SADDO: in lowerOverflowArithmetic()
2463 (Cond.getOperand(0).getOpcode() == ISD::SADDO || in LowerBRCOND()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 320 case ISD::SADDO: return "saddo"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 426 case ISD::SADDO: in LegalizeOp()
1054 case ISD::SADDO: in Expand()
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| H A D | LegalizeIntegerTypes.cpp | 200 case ISD::SADDO: in PromoteIntegerResult()
1191 unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_SADDSUBO()
2728 case ISD::SADDO: in ExpandIntegerResult()
4319 assert((Node->getOpcode() == ISD::SADDO || Node->getOpcode() == ISD::SSUBO) && in ExpandIntRes_SADDSUBO()
4327 bool IsAdd = Node->getOpcode() == ISD::SADDO; in ExpandIntRes_SADDSUBO()
4347 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::SADDO ? in ExpandIntRes_SADDSUBO()
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| H A D | SelectionDAG.cpp | 3761 case ISD::SADDO: in computeKnownBits()
4507 case ISD::SADDO: in ComputeNumSignBits()
9849 case ISD::SADDO: in getNode()
9876 if (Opcode == ISD::UADDO || Opcode == ISD::SADDO) in getNode()
12150 assert((Opcode == ISD::UADDO || Opcode == ISD::SADDO || in UnrollVectorOverflowOp()
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| H A D | LegalizeVectorTypes.cpp | 185 case ISD::SADDO: in ScalarizeVectorResult()
1197 case ISD::SADDO: in SplitVectorResult()
4209 case ISD::SADDO: in WidenVectorResult()
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| H A D | DAGCombiner.cpp | 1932 case ISD::SADDO: in visit()
3308 bool IsSigned = (ISD::SADDO == N->getOpcode()); in visitADDO()
3701 TLI.isOperationLegalOrCustom(ISD::SADDO, N->getValueType(0))) in visitSADDO_CARRY()
3702 return DAG.getNode(ISD::SADDO, DL, N->getVTList(), N0, N1); in visitSADDO_CARRY()
4273 return DAG.getNode(ISD::SADDO, DL, N->getVTList(), N0, in visitSUBO()
5493 return DAG.getNode(IsSigned ? ISD::SADDO : ISD::UADDO, DL, in visitMULO()
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| H A D | TargetLowering.cpp | 10023 OverflowOp = ISD::SADDO; in expandAddSubSat()
10433 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO()
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| H A D | LegalizeDAG.cpp | 3894 case ISD::SADDO: in ExpandNode()
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| H A D | SelectionDAGBuilder.cpp | 7130 case Intrinsic::sadd_with_overflow: Op = ISD::SADDO; break; in visitIntrinsicCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3974 { ISD::SADDO, MVT::i64, { 1 } }, in getIntrinsicInstrCost()
4026 { ISD::SADDO, MVT::i32, { 1 } }, in getIntrinsicInstrCost()
4027 { ISD::SADDO, MVT::i16, { 1 } }, in getIntrinsicInstrCost()
4028 { ISD::SADDO, MVT::i8, { 1 } }, in getIntrinsicInstrCost()
4124 ISD = ISD::SADDO; in getIntrinsicInstrCost()
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| H A D | X86ISelLowering.cpp | 2363 setOperationAction(ISD::SADDO, VT, Custom); in X86TargetLowering()
23753 case ISD::SADDO: in getX86XALUOOp()
24053 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO || in LowerSELECT()
27966 DAG.getNode(Opcode == ISD::SADDSAT ? ISD::SADDO : ISD::SSUBO, DL, in LowerADDSAT_SUBSAT()
31966 case ISD::SADDO: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 850 setOperationAction({ISD::SADDO, ISD::SSUBO, ISD::UADDO, ISD::USUBO, in initActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1550 setOperationAction(ISD::SADDO, VT, Expand); in HexagonTargetLowering()
1627 ISD::SREM, ISD::UREM, ISD::SDIVREM, ISD::UDIVREM, ISD::SADDO, in HexagonTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1135 setOperationAction(ISD::SADDO, MVT::i32, Custom); in ARMTargetLowering()
4926 case ISD::SADDO: in getARMXALUOOp()
5124 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerSELECT()
5706 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBRCOND()
5757 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBR_CC()
10626 case ISD::SADDO: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 523 ISD::ROTL, ISD::ROTR, ISD::SADDO, ISD::SADDO_CARRY, in NVPTXTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 647 setOperationAction(ISD::SADDO, MVT::i32, Custom); in AArch64TargetLowering()
648 setOperationAction(ISD::SADDO, MVT::i64, Custom); in AArch64TargetLowering()
3684 case ISD::SADDO: in getAArch64XALUOOp()
6158 case ISD::SADDO: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 281 setOperationAction(ISD::SADDO, MVT::i32, Custom); in RISCVTargetLowering()
11645 case ISD::SADDO: { in ReplaceNodeResults()
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