Home
last modified time | relevance | path

Searched refs:Rt2 (Results 1 – 14 of 14) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp1407 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodeExclusiveLdStInstruction() local
1461 DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder); in DecodeExclusiveLdStInstruction()
1470 DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder); in DecodeExclusiveLdStInstruction()
1479 Rt == Rt2) in DecodeExclusiveLdStInstruction()
1490 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodePairLdStInstruction() local
1554 DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder); in DecodePairLdStInstruction()
1567 DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder); in DecodePairLdStInstruction()
1578 DecodeFPR128RegisterClass(Inst, Rt2, Addr, Decoder); in DecodePairLdStInstruction()
1589 DecodeFPR64RegisterClass(Inst, Rt2, Addr, Decoder); in DecodePairLdStInstruction()
1600 DecodeFPR32RegisterClass(Inst, Rt2, Addr, Decoder); in DecodePairLdStInstruction()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2216 unsigned Rt2 = Rt + 1; in DecodeAddrMode3Instruction() local
2244 if (Rt2 == 15) in DecodeAddrMode3Instruction()
2263 if (Rt2 == 15) in DecodeAddrMode3Instruction()
2269 if (!type && (Rt2 == 15 || Rm == 15 || Rm == Rt || Rm == Rt2)) in DecodeAddrMode3Instruction()
5801 if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F) in DecodeVMOVSRR()
5827 if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F) in DecodeVMOVRRS()
5889 if (writeback && (Rn == Rt || Rn == Rt2)) in DecodeT2LDRDPreInstruction()
5891 if (Rt == Rt2) in DecodeT2LDRDPreInstruction()
5926 if (writeback && (Rn == Rt || Rn == Rt2)) in DecodeT2STRDPreInstruction()
5994 if (Rt == Rn || Rn == Rt2) in DecodeSwap()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td1216 bits<4> Rt2;
1222 let Inst{19-16} = Rt2;
1232 // $Rt2 = EXTRACT_SUBREG $Dm, ssub_1
1244 bits<4> Rt2;
1250 let Inst{19-16} = Rt2;
1265 (outs DPR:$Dm), (ins GPR:$Rt, GPR:$Rt2),
1273 bits<4> Rt2;
1279 let Inst{19-16} = Rt2;
1288 // $Dm = REG_SEQUENCE $Rt, ssub_0, $Rt2, ssub_1
2770 def : VFP2InstAlias<"vmov${p}.f64 $Rt, $Rt2, $Dn",
[all …]
H A DARMInstrThumb2.td1475 def t2LDRDi8 : T2Ii8s4<1, 0, 1, (outs rGPR:$Rt, rGPR:$Rt2),
3721 bits<4> Rt2;
3722 let Inst{11-8} = Rt2;
3755 bits<4> Rt2;
3756 let Inst{11-8} = Rt2;
3802 bits<4> Rt2;
3803 let Inst{11-8} = Rt2;
3848 bits<4> Rt2;
3849 let Inst{11-8} = Rt2;
4642 bits<4> Rt2;
[all …]
H A DARMInstrInfo.td2996 "ldrd", "\t$Rt, $Rt2, $addr!",
3009 "ldrd", "\t$Rt, $Rt2, $addr, $offset",
3329 "strd", "\t$Rt, $Rt2, $addr!",
5723 bits<4> Rt2;
5729 let Inst{19-16} = Rt2;
5737 GPRnopc:$Rt2, c_imm:$CRm),
5741 (outs GPRnopc:$Rt, GPRnopc:$Rt2),
5754 bits<4> Rt2;
5760 let Inst{19-16} = Rt2;
5770 GPRnopc:$Rt2, c_imm:$CRm),
[all …]
H A DARMInstrFormats.td716 : AI<oops, iops, MiscFrm, NoItinerary, opc, "\t$Rt, $Rt2, $addr", pattern> {
718 bits<4> Rt2;
726 let Inst{3-0} = Rt2;
1415 bits<4> Rt2;
1425 let Inst{11-8} = Rt2{3-0};
1434 bits<4> Rt2;
1445 let Inst{11-8} = Rt2{3-0};
H A DARMInstrMVE.td5873 bits<5> Rt2;
5882 let Inst{19-16} = Rt2{3-0};
5920 (ins MQPR:$QdSrc, rGPR:$Rt, rGPR:$Rt2),
5921 0b1, "$Qd$idx, $QdSrc$idx2, $Rt, $Rt2",
5926 def MVE_VMOV_rr_q : MVE_VMOV_64bit<(outs rGPR:$Rt, rGPR:$Rt2), (ins MQPR:$Qd),
5927 0b0, "$Rt, $Rt2, $Qd$idx, $Qd$idx2", ""> {
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td4504 bits<5> Rt2;
4513 let Inst{14-10} = Rt2;
4553 bits<5> Rt2;
4594 bits<5> Rt2;
4635 bits<5> Rt2;
4750 bits<5> Rt2;
4795 bits<5> Rt2;
12231 bits<5> Rt2;
12419 "\t$Rt, $Rt2, [$Rn]", "$Rt = $Rt_wb, $Rt2 = $Rt2_wb", []>,
12425 bits<5> Rt2;
[all …]
H A DAArch64InstrInfo.td2391 (STGPi $Rt, $Rt2, $Rn, $imm)>;
3762 (STPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, simm7s8:$offset)>;
3765 (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, simm7s16:$offset)>;
9410 …Pair<0b10, 0b00, 0b0001, (outs), (ins GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn), "stilp", "\t$Rt, $Rt2, …
9411 …Pair<0b11, 0b00, 0b0001, (outs), (ins GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn), "stilp", "\t$Rt, $Rt2, …
9412 …b01, 0b0000, (outs GPR64sp:$wback, GPR32:$Rt, GPR32:$Rt2), (ins GPR64sp:$Rn), "ldiapp", "\t$Rt, $R…
9414 …orePair<0b10, 0b01, 0b0001, (outs GPR32:$Rt, GPR32:$Rt2), (ins GPR64sp0:$Rn), "ldiapp", "\t$Rt, $R…
9415 …orePair<0b11, 0b01, 0b0001, (outs GPR64:$Rt, GPR64:$Rt2), (ins GPR64sp0:$Rn), "ldiapp", "\t$Rt, $R…
9418 …def : Pat<(AArch64stilp GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn), (STILPX GPR64:$Rt, GPR64:$Rt2, GPR64s…
9421 def : InstAlias<"stilp\t$Rt, $Rt2, [$Rn, #0]", (STILPW GPR32: $Rt, GPR32: $Rt2, GPR64sp:$Rn)>;
[all …]
/freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp699 uint32_t Rt2 = Bits32(opcode, 14, 10); in EmulateLDPSTP() local
705 integer t2 = UInt(Rt2); in EmulateLDPSTP()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5272 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
5277 if (RI->isSubRegisterEq(Rn, Rt2)) in validateInstruction()
5297 unsigned Rt2 = Inst.getOperand(1).getReg(); in validateInstruction() local
5298 if (Rt == Rt2) in validateInstruction()
5310 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
5311 if (Rt == Rt2) in validateInstruction()
5326 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
5331 if (RI->isSubRegisterEq(Rn, Rt2)) in validateInstruction()
5407 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
5409 if (RI->isSubRegisterEq(Rt1, Rs) || RI->isSubRegisterEq(Rt2, Rs) || in validateInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp7316 unsigned Rt2 = MRI->getEncodingValue(Reg2); in ParseInstruction() local
7319 if (Rt + 1 != Rt2 || (Rt & 1)) { in ParseInstruction()
7437 unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(RtIndex + 1).getReg()); in validateLDRDSTRD() local
7451 if (Rt2 != Rt + 1) { in validateLDRDSTRD()
7465 if (Rt2 == Rt) in validateLDRDSTRD()
7473 if (Rn == Rt || Rn == Rt2) { in validateLDRDSTRD()
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp8211 Value *Rt2 = Builder.CreateLShr(Call, 32); in EmitAMDGCNBallotForExec() local
8212 Rt2 = Builder.CreateTrunc(Rt2, CGF.Int32Ty); in EmitAMDGCNBallotForExec()
8213 return Rt2; in EmitAMDGCNBallotForExec()
8443 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); in EmitARMBuiltinExpr() local
8444 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); in EmitARMBuiltinExpr()
8446 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); in EmitARMBuiltinExpr()
/freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp11162 uint32_t Rt2 = ReadCoreReg(t2, &success); in EmulateSTRDReg() local
11171 if (!MemAWrite(context, address + 4, Rt2, addr_byte_size)) in EmulateSTRDReg()