Searched refs:RotateVT (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4636 MVT RotateVT = MVT::getVectorVT(MVT::getIntegerVT(EltSizeInBits * NumSubElts), in lowerVECTOR_SHUFFLEAsRotate() local
4640 if (!Subtarget.getTargetLowering()->isTypeLegal(RotateVT)) in lowerVECTOR_SHUFFLEAsRotate()
4643 SDValue Op = DAG.getBitcast(RotateVT, SVN->getOperand(0)); in lowerVECTOR_SHUFFLEAsRotate()
4648 if (RotateVT.getScalarType() == MVT::i16 && RotateAmt == 8) in lowerVECTOR_SHUFFLEAsRotate()
4649 Rotate = DAG.getNode(ISD::BSWAP, DL, RotateVT, Op); in lowerVECTOR_SHUFFLEAsRotate()
4651 Rotate = DAG.getNode(ISD::ROTL, DL, RotateVT, Op, in lowerVECTOR_SHUFFLEAsRotate()
4652 DAG.getConstant(RotateAmt, DL, RotateVT)); in lowerVECTOR_SHUFFLEAsRotate()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11141 static int matchShuffleAsBitRotate(MVT &RotateVT, int EltSizeInBits, in matchShuffleAsBitRotate() argument
11156 RotateVT = MVT::getVectorVT(RotateSVT, NumElts / NumSubElts); in matchShuffleAsBitRotate()
11172 MVT RotateVT; in lowerShuffleAsBitRotate() local
11173 int RotateAmt = matchShuffleAsBitRotate(RotateVT, VT.getScalarSizeInBits(), in lowerShuffleAsBitRotate()
11186 unsigned SrlAmt = RotateVT.getScalarSizeInBits() - RotateAmt; in lowerShuffleAsBitRotate()
11187 V1 = DAG.getBitcast(RotateVT, V1); in lowerShuffleAsBitRotate()
11188 SDValue SHL = DAG.getNode(X86ISD::VSHLI, DL, RotateVT, V1, in lowerShuffleAsBitRotate()
11190 SDValue SRL = DAG.getNode(X86ISD::VSRLI, DL, RotateVT, V1, in lowerShuffleAsBitRotate()
11192 SDValue Rot = DAG.getNode(ISD::OR, DL, RotateVT, SHL, SRL); in lowerShuffleAsBitRotate()
11197 DAG.getNode(X86ISD::VROTLI, DL, RotateVT, DAG.getBitcast(RotateVT, V1), in lowerShuffleAsBitRotate()
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