Searched refs:RootDef (Results 1 – 3 of 3) sorted by relevance
378 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg()); in selectAddrRegImm() local379 if (RootDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) { in selectAddrRegImm()381 [=](MachineInstrBuilder &MIB) { MIB.add(RootDef->getOperand(1)); }, in selectAddrRegImm()387 MachineOperand &LHS = RootDef->getOperand(1); in selectAddrRegImm()388 MachineOperand &RHS = RootDef->getOperand(2); in selectAddrRegImm()
7307 if (RootDef.getOpcode() != AArch64::G_ADD_LOW) in tryFoldAddLowIntoImm()7322 auto &MF = *RootDef.getParent()->getParent(); in tryFoldAddLowIntoImm()7327 MachineIRBuilder MIRBuilder(RootDef); in tryFoldAddLowIntoImm()7366 MachineOperand &LHS = RootDef->getOperand(1); in selectAddrModeIndexed()7367 MachineOperand &RHS = RootDef->getOperand(2); in selectAddrModeIndexed()7544 if (!RootDef) in selectArithExtendedRegister()7553 MachineOperand &RHS = RootDef->getOperand(2); in selectArithExtendedRegister()7561 MachineOperand &LHS = RootDef->getOperand(1); in selectArithExtendedRegister()7571 Ext = getExtendTypeForInst(*RootDef, MRI); in selectArithExtendedRegister()7574 ExtReg = RootDef->getOperand(1).getReg(); in selectArithExtendedRegister()[all …]
4687 if (const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg())) { in selectMUBUFScratchOffen() local4702 } else if (RootDef->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectMUBUFScratchOffen()4703 FI = RootDef->getOperand(1).getIndex(); in selectMUBUFScratchOffen()4925 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg()); in selectDS1Addr1OffsetImpl() local4926 if (!RootDef) in selectDS1Addr1OffsetImpl()4941 } else if (RootDef->getOpcode() == AMDGPU::G_SUB) { in selectDS1Addr1OffsetImpl()4990 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg()); in selectDSReadWrite2Impl() local4991 if (!RootDef) in selectDSReadWrite2Impl()5008 } else if (RootDef->getOpcode() == AMDGPU::G_SUB) { in selectDSReadWrite2Impl()