Searched refs:RetRegs (Results 1 – 8 of 8) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | AVR.cpp | 30 const unsigned RetRegs; member in __anon9a4c7a860111::AVRABIInfo
34 : DefaultABIInfo(CGT), ParamRegs(NPR), RetRegs(NRR) {} in AVRABIInfo()
42 getContext().getTypeSize(Ty) <= RetRegs * 8) in classifyReturnType()
46 if (getContext().getTypeSize(Ty) > RetRegs * 8) { in classifyReturnType()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLegalizerInfo.cpp | 391 Register RetRegs[] = {MRI.createGenericVirtualRegister(LLT::scalar(32)), in legalizeCustom() local
393 auto Status = createLibcall(MIRBuilder, Libcall, {RetRegs, RetTy, 0}, in legalizeCustom()
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| H A D | ARMFastISel.cpp | 2093 SmallVector<unsigned, 4> RetRegs; in SelectRet() local
2154 RetRegs.push_back(VA.getLocReg()); in SelectRet()
2169 for (unsigned R : RetRegs) in SelectRet()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 1701 SmallVector<unsigned, 4> RetRegs; in SelectRet() local
1734 RetRegs.push_back(RetReg); in SelectRet()
1747 RetRegs.push_back(VA.getLocReg()); in SelectRet()
1789 TII.get(TargetOpcode::COPY), RetRegs[i]) in SelectRet()
1798 for (unsigned i = 0, e = RetRegs.size(); i != e; ++i) in SelectRet()
1799 MIB.addReg(RetRegs[i], RegState::Implicit); in SelectRet()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1682 SmallVector<unsigned, 4> RetRegs; in selectRet() local
1763 RetRegs.push_back(VA.getLocReg()); in selectRet()
1766 for (unsigned i = 0, e = RetRegs.size(); i != e; ++i) in selectRet()
1767 MIB.addReg(RetRegs[i], RegState::Implicit); in selectRet()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1208 SmallVector<unsigned, 4> RetRegs; in X86SelectRet() local
1278 RetRegs.push_back(VA.getLocReg()); in X86SelectRet()
1296 RetRegs.push_back(RetReg); in X86SelectRet()
1309 for (unsigned Reg : RetRegs) in X86SelectRet()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 3849 SmallVector<unsigned, 4> RetRegs; in selectRet() local
3925 RetRegs.push_back(VA.getLocReg()); in selectRet()
3930 for (unsigned RetReg : RetRegs) in selectRet()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 762 SmallVector<Register> RetRegs; in createAtomicLibcall() local
772 RetRegs.push_back(Ret); in createAtomicLibcall()
777 RetRegs.push_back(Success); in createAtomicLibcall()
793 RetRegs.push_back(Ret); in createAtomicLibcall()
826 Info.OrigRet = CallLowering::ArgInfo(RetRegs, RetTy, 0); in createAtomicLibcall()
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