| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 188 const EVT ResTys[] = {MVT::i64, MVT::i64, MVT::Other}; in EmitTargetCodeForSetTag() local
199 SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops); in EmitTargetCodeForSetTag()
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| H A D | AArch64ISelDAGToDAG.cpp | 1573 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectLoad() local
1575 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoad()
1606 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoad()
1816 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectPredicatedLoad() local
1818 SDNode *Load = CurDAG->getMachineNode(Opc, DL, ResTys, Ops); in SelectPredicatedLoad()
1851 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectContiguousMultiVectorLoad() local
2091 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostStore()
2146 const EVT ResTys[] = {MVT::Untyped, MVT::Other}; in SelectLoadLane() local
2152 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoadLane()
2195 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoadLane()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2160 std::vector<EVT> ResTys; in SelectVLD() local
2161 ResTys.push_back(ResTy); in SelectVLD()
2163 ResTys.push_back(MVT::i32); in SelectVLD()
2164 ResTys.push_back(MVT::Other); in SelectVLD()
2296 std::vector<EVT> ResTys; in SelectVST() local
2298 ResTys.push_back(MVT::i32); in SelectVST()
2299 ResTys.push_back(MVT::Other); in SelectVST()
2461 std::vector<EVT> ResTys; in SelectVLDSTLane() local
3005 std::vector<EVT> ResTys; in SelectVLDDup() local
3006 ResTys.push_back(ResTy); in SelectVLDDup()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 876 SmallVector<EVT, 2> ResTys{Node->getValueType(0), Node->getValueType(1)}; in trySelect() local
878 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
946 SmallVector<EVT, 1> ResTys{Node->getValueType(0)}; in trySelect() local
948 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
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| H A D | MipsSEISelLowering.cpp | 1331 SmallVector<EVT, 2> ResTys; in lowerDSPIntr() local
1334 ResTys.push_back((Ty == MVT::i64) ? MVT::Untyped : Ty); in lowerDSPIntr()
1337 SDValue Val = DAG.getNode(Opc, DL, ResTys, Ops); in lowerDSPIntr()
1338 SDValue Out = (ResTys[0] == MVT::Untyped) ? extractLOHI(Val, DL, DAG) : Val; in lowerDSPIntr()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 294 SDVTList ResTys = DAG.getVTList(MVT::i16, MVT::i16); in LowerShifts() local
333 SDValue Result = DAG.getNode(Opc, dl, ResTys, SrcLo, SrcHi, Cnt); in LowerShifts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1906 SDVTList ResTys = DAG.getVTList(ResTy, ResTy); in LowerHvxMulh() local
1911 return DAG.getNode(HexagonISD::UMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
1913 return DAG.getNode(HexagonISD::SMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
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