| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 56 RegPressure.resize(NumRC); in ResourcePriorityQueue()
58 std::fill(RegPressure.begin(), RegPressure.end(), 0); in ResourcePriorityQueue()
364 if ((RegPressure[RC->getID()] + in regPressureDelta()
366 (RegPressure[RC->getID()] + in regPressureDelta()
479 RegPressure[RC->getID()] += numberRCValSuccInSU(SU, RC->getID()); in scheduledNode()
490 if (RegPressure[RC->getID()] > in scheduledNode()
492 RegPressure[RC->getID()] -= numberRCValPredInSU(SU, RC->getID()); in scheduledNode()
493 else RegPressure[RC->getID()] = 0; in scheduledNode()
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| H A D | ScheduleDAGRRList.cpp | 1752 std::vector<unsigned> RegPressure; member in __anonfa9907a40311::RegReductionPQBase
1771 RegPressure.resize(NumRC); in RegReductionPQBase()
1773 std::fill(RegPressure.begin(), RegPressure.end(), 0); in RegReductionPQBase()
1796 std::fill(RegPressure.begin(), RegPressure.end(), 0); in releaseState()
2085 unsigned RP = RegPressure[Id]; in dumpRegPressure()
2222 RegPressure[RCId] += Cost; in scheduledNode()
2237 if (RegPressure[RCId] < Cost) { in scheduledNode()
2242 RegPressure[RCId] = 0; in scheduledNode()
2245 RegPressure[RCId] -= Cost; in scheduledNode()
2305 RegPressure[RCId] += RegSequenceCost; in unscheduledNode()
[all …]
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| H A D | SelectionDAGISel.cpp | 296 if (TLI->getSchedulingPreference() == Sched::RegPressure) in createDefaultScheduler()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineLICM.cpp | 159 SmallVector<unsigned, 8> RegPressure; member in __anon32eb8ca40111::MachineLICMBase
202 RegPressure.clear(); in releaseMemory()
367 RegPressure.resize(NumRPS); in INITIALIZE_PASS_DEPENDENCY()
368 std::fill(RegPressure.begin(), RegPressure.end(), 0); in INITIALIZE_PASS_DEPENDENCY()
699 BackTrace.push_back(RegPressure); in EnterScope()
837 std::fill(RegPressure.begin(), RegPressure.end(), 0); in InitRegPressure()
860 if (static_cast<int>(RegPressure[Class]) < -RPIdAndCost.second) in UpdateRegPressure()
861 RegPressure[Class] = 0; in UpdateRegPressure()
863 RegPressure[Class] += RPIdAndCost.second; in UpdateRegPressure()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ResourcePriorityQueue.h | 52 std::vector<unsigned> RegPressure; variable
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| H A D | MachineScheduler.h | 420 IntervalPressure RegPressure; variable
440 RegClassInfo(C->RegClassInfo), RPTracker(RegPressure), in ScheduleDAGMILive()
460 const IntervalPressure &getRegPressure() const { return RegPressure; } in getRegPressure()
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| H A D | TargetLowering.h | 102 RegPressure, // Scheduling for lowest register pressure. enumerator
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 48 setSchedulingPreference(Sched::RegPressure); in AVRTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 56 setSchedulingPreference(Sched::RegPressure); in WebAssemblyTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1607 setSchedulingPreference(Sched::RegPressure); in ARMTargetLowering()
1966 return Sched::RegPressure; in getSchedulingPreference()
1977 return Sched::RegPressure; in getSchedulingPreference()
1985 return Sched::RegPressure; in getSchedulingPreference()
1990 return Sched::RegPressure; in getSchedulingPreference()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 423 setSchedulingPreference(Sched::RegPressure); in NVPTXTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 532 setSchedulingPreference(Sched::RegPressure); in AMDGPUTargetLowering()
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| H A D | SIISelLowering.cpp | 946 setSchedulingPreference(Sched::RegPressure); in SITargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 130 setSchedulingPreference(Sched::RegPressure); in SystemZTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 107 setSchedulingPreference(Sched::RegPressure); in X86TargetLowering()
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