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Searched refs:RegNum (Results 1 – 25 of 51) sorted by relevance

123

/freebsd-14.2/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_mips64.cpp34 enum RegNum : uint32_t { enum
105 RegNum::RN_RA, 0x8); in patchSled()
107 RegNum::RN_T9, 0x0); in patchSled()
113 RegNum::RN_T9, RegNum::RN_T9, 0x10); in patchSled()
117 RegNum::RN_T9, RegNum::RN_T9, 0x10); in patchSled()
123 0x0, RegNum::RN_RA, 0X0); in patchSled()
125 RegNum::RN_T0, LoFunctionID); in patchSled()
127 RegNum::RN_T9, 0x0); in patchSled()
129 RegNum::RN_RA, 0x8); in patchSled()
131 RegNum::RN_SP, 0x10); in patchSled()
[all …]
H A Dxray_loongarch64.cpp21 enum RegNum : uint32_t { enum
88 Address[1] = encodeInstruction2RIx(0x29c00000, RegNum::RN_RA, RegNum::RN_SP, in patchSled()
91 0x14000000, RegNum::RN_T0, in patchSled()
94 0x03800000, RegNum::RN_T0, RegNum::RN_T0, in patchSled()
97 0x16000000, RegNum::RN_T0, in patchSled()
100 0x03000000, RegNum::RN_T0, RegNum::RN_T0, in patchSled()
106 encodeInstruction2RIx(0x03800000, RegNum::RN_T1, RegNum::RN_T1, in patchSled()
108 Address[8] = encodeInstruction2RIx(0x4c000000, RegNum::RN_RA, RegNum::RN_T0, in patchSled()
110 Address[9] = encodeInstruction2RIx(0x28c00000, RegNum::RN_RA, RegNum::RN_SP, in patchSled()
113 0x02c00000, RegNum::RN_SP, RegNum::RN_SP, 0x10); // addi.d sp, sp, 16 in patchSled()
[all …]
H A Dxray_mips.cpp33 enum RegNum : uint32_t { enum
104 Address[2] = encodeInstruction(PatchOpcodes::PO_SW, RegNum::RN_SP, in patchSled()
105 RegNum::RN_RA, 0x4); in patchSled()
107 RegNum::RN_T9, 0x0); in patchSled()
111 RegNum::RN_T9, LoTracingHookAddr); in patchSled()
115 0x0, RegNum::RN_RA, 0X0); in patchSled()
117 RegNum::RN_T0, LoFunctionID); in patchSled()
119 RegNum::RN_T9, 0x0); in patchSled()
121 RegNum::RN_RA, 0x4); in patchSled()
123 RegNum::RN_SP, 0x8); in patchSled()
[all …]
H A Dxray_hexagon.cpp37 enum RegNum : uint32_t { enum
43 encodeExtendedTransferImmediate(uint32_t Imm, RegNum DestReg, in encodeExtendedTransferImmediate()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp78 DwarfLLVMRegPair Key = { RegNum, 0 }; in getDwarfRegNum()
80 if (I == M+Size || I->FromReg != RegNum) in getDwarfRegNum()
85 std::optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum() argument
92 DwarfLLVMRegPair Key = { RegNum, 0 }; in getLLVMRegNum()
94 if (I != M + Size && I->FromReg == RegNum) in getLLVMRegNum()
108 if (std::optional<unsigned> LRegNum = getLLVMRegNum(RegNum, true)) { in getDwarfRegNumFromDwarfEHRegNum()
111 return RegNum; in getDwarfRegNumFromDwarfEHRegNum()
115 return RegNum; in getDwarfRegNumFromDwarfEHRegNum()
118 int MCRegisterInfo::getSEHRegNum(MCRegister RegNum) const { in getSEHRegNum()
120 if (I == L2SEHRegs.end()) return (int)RegNum; in getSEHRegNum()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
H A DDWARFDebugFrame.cpp142 return RegNum == RHS.RegNum && Offset == RHS.Offset && in operator ==()
573 if (!RegNum) in parseRows()
587 if (!RegNum) in parseRows()
650 for (uint32_t RegNum = 16; RegNum < 32; ++RegNum) { in parseRows() local
669 if (!RegNum) in parseRows()
678 if (!RegNum) in parseRows()
690 if (!RegNum) in parseRows()
703 if (!RegNum) in parseRows()
715 if (!RegNum) in parseRows()
724 if (!RegNum) in parseRows()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp78 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
84 if (RegNum != NumArgRegs && RegNum % 2 == 1) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
85 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignArgRegs()
103 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
104 int RegsLeft = NumArgRegs - RegNum; in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
108 if (RegNum != NumArgRegs && RegsLeft < 4) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
110 State.AllocateReg(ArgRegs[RegNum + i]); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
129 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
133 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
134 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp352 int RegNum = matchFn(Name); in parseRegisterName() local
358 if (RegNum == AVR::NoRegister) { in parseRegisterName()
361 if (RegNum == AVR::NoRegister) { in parseRegisterName()
365 return RegNum; in parseRegisterName()
371 if (RegNum == AVR::NoRegister) in parseRegisterName()
374 return RegNum; in parseRegisterName()
378 int RegNum = AVR::NoRegister; in parseRegister() local
400 return RegNum; in parseRegister()
751 if (0 <= RegNum && RegNum <= 15 && in validateTargetOperandClass()
756 RegName << "r" << RegNum; in validateTargetOperandClass()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRInstPrinter.cpp89 const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, in getPrettyRegisterName() argument
94 unsigned RegLoNum = MRI.getSubReg(RegNum, AVR::sub_lo); in getPrettyRegisterName()
95 RegNum = (RegLoNum != AVR::NoRegister) ? RegLoNum : RegNum; in getPrettyRegisterName()
98 return getRegisterName(RegNum); in getPrettyRegisterName()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFDebugFrame.h68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
80 : Kind(K), RegNum(InvalidRegisterNumber), Offset(0), in UnwindLocation()
85 : Kind(K), RegNum(Reg), Offset(Off), AddrSpace(AS), Dereference(Deref) {} in UnwindLocation()
88 : Kind(DWARFExpr), RegNum(InvalidRegisterNumber), Offset(0), Expr(E), in UnwindLocation()
132 uint32_t getRegister() const { return RegNum; } in getRegister()
142 void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; } in setRegister()
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation() argument
193 auto Pos = Locations.find(RegNum); in getRegisterLocation()
205 Locations.erase(RegNum); in setRegisterLocation()
206 Locations.insert(std::make_pair(RegNum, Location)); in setRegisterLocation()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp201 unsigned RegNum; member
243 return Reg.RegNum; in getReg()
432 Op->Reg.RegNum = RegNum; in CreateReg()
1779 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1784 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1796 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1801 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1813 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1818 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1833 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/
H A DMSP430AsmParser.cpp200 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg() argument
202 return std::make_unique<MSP430Operand>(k_Reg, RegNum, S, E); in CreateReg()
210 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem() argument
213 return std::make_unique<MSP430Operand>(RegNum, Val, S, E); in CreateMem()
216 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg() argument
218 return std::make_unique<MSP430Operand>(k_IndReg, RegNum, S, E); in CreateIndReg()
221 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg() argument
223 return std::make_unique<MSP430Operand>(k_PostIndReg, RegNum, S, E); in CreatePostIndReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp379 unsigned RegNum; member
2240 Op->Reg.RegNum = RegNum; in CreateReg()
2273 Op->VectorList.RegNum = RegNum; in CreateVectorList()
2466 Op->MatrixReg.RegNum = RegNum; in CreateMatrixRegister()
2944 if (!RegNum) { in matchRegisterNameAlias()
2965 return RegNum; in matchRegisterNameAlias()
2997 RegNum = Reg; in tryParseScalarRegister()
4155 if (RegNum) { in tryParseVectorRegister()
4163 Reg = RegNum; in tryParseVectorRegister()
4339 if (!RegNum) in tryParseMatrixTileList()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCCodeEmitter.cpp205 unsigned RegNum = Op.getReg(); in getMachineOpValue() local
207 Value |= RI->getEncodingValue(RegNum); in getMachineOpValue()
209 if (M68kII::isAddressRegister(RegNum)) in getMachineOpValue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp121 unsigned RegNum; member
156 return Reg.RegNum; in getReg()
592 static std::unique_ptr<LanaiOperand> createReg(unsigned RegNum, SMLoc Start, in createReg()
595 Op->Reg.RegNum = RegNum; in createReg()
694 unsigned RegNum; in parseRegister() local
701 RegNum = MatchRegisterName(Lexer.getTok().getIdentifier()); in parseRegister()
702 if (RegNum == 0) { in parseRegister()
708 return LanaiOperand::createReg(RegNum, Start, End); in parseRegister()
715 bool LanaiAsmParser::parseRegister(MCRegister &RegNum, SMLoc &StartLoc, in parseRegister() argument
722 RegNum = Op->getReg(); in parseRegister()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h426 int getDwarfRegNum(MCRegister RegNum, bool isEH) const;
430 std::optional<unsigned> getLLVMRegNum(unsigned RegNum, bool isEH) const;
434 int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const;
438 int getSEHRegNum(MCRegister RegNum) const;
442 int getCodeViewRegNum(MCRegister RegNum) const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/
H A DVEAsmParser.cpp176 unsigned RegNum; member
349 return Reg.RegNum; in getReg()
602 Op->Reg.RegNum = RegNum; in CreateReg()
650 Op.Reg.RegNum = I32Regs[regIdx]; in MorphToI32Reg()
659 Op.Reg.RegNum = F32Regs[regIdx]; in MorphToF32Reg()
668 Op.Reg.RegNum = F128Regs[regIdx / 2]; in MorphToF128Reg()
689 Op.Reg.RegNum = MISCRegs[regIdx]; in MorphToMISCReg()
811 int RegNum = matchFn(Name); in parseRegisterName() local
815 if (RegNum == VE::NoRegister) { in parseRegisterName()
816 RegNum = matchFn(Name.lower()); in parseRegisterName()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DStackMaps.cpp196 int RegNum; in getDwarfRegNum() local
198 RegNum = TRI->getDwarfRegNum(SR, false); in getDwarfRegNum()
199 if (RegNum >= 0) in getDwarfRegNum()
203 assert(RegNum >= 0 && isUInt<16>(RegNum) && "Invalid Dwarf register number."); in getDwarfRegNum()
204 return (unsigned)RegNum; in getDwarfRegNum()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.h47 int getDwarfRegNum(unsigned RegNum, bool IsEH) const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/
H A DCSKYAsmParser.cpp157 unsigned RegNum; member
405 return Reg.RegNum; in getReg()
484 Op->Reg.RegNum = RegNo; in createReg()
632 return Reg.RegNum == Other.Reg.RegNum; in isValidForTie()
1631 Op.Reg.RegNum = convertFPR32ToFPR64(Reg); in validateTargetOperandClass()
1633 (Op.Reg.RegNum < CSKY::F0_64 || Op.Reg.RegNum > CSKY::F15_64)) in validateTargetOperandClass()
1636 (Op.Reg.RegNum < CSKY::F0_64 || Op.Reg.RegNum > CSKY::F31_64)) in validateTargetOperandClass()
1644 Op.Reg.RegNum = MRI->getEncodingValue(Reg) + CSKY::R0_R1; in validateTargetOperandClass()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGIMatchTableExecutorImpl.h1085 uint16_t RegNum = readU16(); in executeMatchTable() local
1089 OutMIs[InsnID].addDef(RegNum, Flags); in executeMatchTable()
1092 << InsnID << "], " << RegNum << ")\n"); in executeMatchTable()
1098 uint16_t RegNum = readU16(); in executeMatchTable() local
1100 OutMIs[InsnID].addUse(RegNum, RegState::Implicit); in executeMatchTable()
1103 << InsnID << "], " << RegNum << ")\n"); in executeMatchTable()
1109 uint16_t RegNum = readU16(); in executeMatchTable() local
1112 OutMIs[InsnID].addReg(RegNum, RegFlags); in executeMatchTable()
1116 << "], " << RegNum << ", " << RegFlags << ")\n"); in executeMatchTable()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp89 unsigned RegNum; member
153 return Reg.RegNum; in getReg()
212 Op->Reg.RegNum = RegNo; in createReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp291 auto DecodeRegisterOrImm = [&Inst, Address, Decoder](Field RegNum, in DecodeMoveHRegInstruction()
293 if (30 == RegNum) { in DecodeMoveHRegInstruction()
298 return DecodeGPR32RegisterClass(Inst, RegNum, Address, Decoder); in DecodeMoveHRegInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp253 unsigned RegNum; member
342 return Reg.RegNum; in getReg()
474 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind, in CreateReg() argument
477 Op->Reg.RegNum = RegNum; in CreateReg()
516 Op.Reg.RegNum = IntPairRegs[regIdx / 2]; in MorphToIntPairReg()
527 Op.Reg.RegNum = DoubleRegs[regIdx / 2]; in MorphToDoubleReg()
550 Op.Reg.RegNum = Reg; in MorphToQuadReg()
563 Op.Reg.RegNum = CoprocPairRegs[regIdx / 2]; in MorphToCoprocPairReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/
H A DXtensaAsmParser.cpp99 unsigned RegNum; member
249 return Reg.RegNum; in getReg()
288 Op->Reg.RegNum = RegNo; in createReg()

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