| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 65 memset(RegMap, 0, sizeof(RegMap)); in FPS()
163 unsigned RegMap[NumFPRegs]; member
185 return RegMap[RegNo]; in getSlot()
213 RegMap[Reg] = StackTop++; in pushReg()
232 std::swap(RegMap[RegNo], RegMap[RegOnTop]); in moveToTop()
235 if (RegMap[RegOnTop] >= StackTop) in moveToTop()
906 RegMap[TopReg] = OldSlot; in freeStackSlotBefore()
907 RegMap[FPRegNo] = ~0; in freeStackSlotBefore()
937 std::swap(RegMap[KReg], RegMap[DReg]); in adjustLiveRegs()
1442 RegMap[Dest] = UpdatedSlot; in handleTwoArgFP()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 141 DenseMap<Register, Register> &RegMap) const;
458 DenseMap<Register, Register> &RegMap) { in getMappedReg() argument
460 DenseMap<Register, Register>::iterator SI = RegMap.find(Reg); in getMappedReg()
461 if (SI == RegMap.end()) in getMappedReg()
482 const MachineOperand &MO, DenseMap<Register, Register> &RegMap) const { in removeMapRegEntry()
488 for (auto SI : RegMap) { in removeMapRegEntry()
502 RegMap.erase(SrcReg); in removeMapRegEntry()
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| H A D | MachineVerifier.cpp | 122 using RegMap = DenseMap<Register, const MachineInstr *>; typedef
150 RegMap vregsLiveIn;
192 bool addRequired(const RegMap &RM) { in addRequired()
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1422 using RegMap = std::map<const CodeGenRegister*, const CodeGenRegister*>; in computeComposites() typedef
1427 std::map<const CodeGenSubRegIndex*, RegMap> SubRegAction; in computeComposites()
1438 RegMap C; in computeComposites()
1439 const RegMap &Img1 = SubRegAction.at(Sub1); in computeComposites()
1440 const RegMap &Img2 = SubRegAction.at(Sub2); in computeComposites()
1450 auto agree = [] (const RegMap &Map1, const RegMap &Map2) { in computeComposites()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 298 DenseMap<unsigned, unsigned> &RegMap = VRegMapping[RC]; in encodeVirtualRegister() local
299 unsigned RegNum = RegMap[Reg]; in encodeVirtualRegister()
591 const DenseMap<unsigned, unsigned> &RegMap = I->second; in getVirtualRegisterName() local
593 VRegMap::const_iterator VI = RegMap.find(Reg); in getVirtualRegisterName()
594 assert(VI != RegMap.end() && "Bad virtual register"); in getVirtualRegisterName()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1381 UnsignedMap RegMap; in generateInserts() local
1386 RegMap[VR] = NewVR; in generateInserts()
1396 unsigned NewR = RegMap[I.first]; in generateInserts()
1428 MRI->replaceRegWith(I.first, RegMap[I.first]); in generateInserts()
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| H A D | HexagonBitSimplify.cpp | 3104 DenseMap<unsigned,unsigned> RegMap; in moveGroup() local
3113 RegMap.insert(std::make_pair(G.Inp.Reg, PhiR)); in moveGroup()
3129 unsigned UseR = RegMap[Op.getReg()]; in moveGroup()
3132 RegMap.insert(std::make_pair(DR, NewDR)); in moveGroup()
3135 HBS::replaceReg(OldPhiR, RegMap[G.Out.Reg], *MRI); in moveGroup()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 228 } RegMap[] = { in initLLVMToCVRegMapping() local
329 for (const auto &I : RegMap) in initLLVMToCVRegMapping()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 71 } RegMap[] = { in initLLVMToCVRegMapping() local
299 for (const auto &I : RegMap) in initLLVMToCVRegMapping()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 179 } RegMap[] = { in initLLVMToSEHAndCVRegMapping() local
386 for (const auto &I : RegMap) in initLLVMToSEHAndCVRegMapping()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2305 RegMap = { in ComputeRegsForAlias() local
2325 std::vector<unsigned> Regs = RegMap[std::make_pair(ElementWidth, Reg)]; in ComputeRegsForAlias()
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