| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMakeCompressible.cpp | 236 if (CandidateRegImm.Reg == RegImm.Reg && CandidateRegImm.Imm == RegImm.Imm) in analyzeCompressibleUses()
244 if (MI.modifiesRegister(RegImm.Reg, TRI)) in analyzeCompressibleUses()
261 if (RISCV::GPRRegClass.contains(RegImm.Reg)) in analyzeCompressibleUses()
337 if (!RegImm.Reg && RegImm.Imm == 0) in runOnMachineFunction()
350 assert(isInt<12>(RegImm.Imm)); in runOnMachineFunction()
352 .addReg(RegImm.Reg) in runOnMachineFunction()
353 .addImm(RegImm.Imm); in runOnMachineFunction()
359 assert(RegImm.Imm == 0); in runOnMachineFunction()
364 .addReg(RegImm.Reg) in runOnMachineFunction()
365 .addReg(RegImm.Reg); in runOnMachineFunction()
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| H A D | RISCVInstrInfo.cpp | 860 case RISCVMatInt::RegImm: in movImm()
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| H A D | RISCVISelDAGToDAG.cpp | 193 case RISCVMatInt::RegImm: in selectImmSeq()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 86 struct RegImm { struct in __anon7cf952360111::AArch64RedundantCopyElimination
89 RegImm(MCPhysReg Reg, int32_t Imm) : Reg(Reg), Imm(Imm) {} in RegImm() argument
93 SmallVectorImpl<RegImm> &KnownRegs,
135 KnownRegs.push_back(RegImm(CondBr.getOperand(0).getReg(), 0)); in knownRegValInBlock()
202 KnownRegs.push_back(RegImm(SrcReg, KnownImm)); in knownRegValInBlock()
217 KnownRegs.push_back(RegImm(DstReg, 0)); in knownRegValInBlock()
262 KnownRegs.push_back(RegImm(DstReg, 0)); in knownRegValInBlock()
303 SmallVector<RegImm, 4> KnownRegs; in optimizeBlock()
332 KnownRegs.push_back(RegImm(CopyDstReg, KnownReg.Imm)); in optimizeBlock()
356 if (all_of(KnownRegs, [&](RegImm KnownReg) { in optimizeBlock()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 117 : Kind(k_Register), RegImm({Reg, nullptr}), Start(S), End(E) {} in AVROperand()
119 : Kind(k_Immediate), RegImm({0, Imm}), Start(S), End(E) {} in AVROperand()
121 : Kind(k_Memri), RegImm({Reg, Imm}), Start(S), End(E) {} in AVROperand()
129 RegisterImmediate RegImm; member
201 return RegImm.Reg; in getReg()
206 return RegImm.Imm; in getImm()
235 RegImm = {RegNo, nullptr}; in makeReg()
240 RegImm = {0, Ex}; in makeImm()
245 RegImm = {RegNo, Imm}; in makeMemri()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.h | 22 RegImm, // ADDI/ADDIW/SLLI/SRLI/BSETI/BCLRI enumerator
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| H A D | RISCVMatInt.cpp | 513 return RISCVMatInt::RegImm; in getOpndKind()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 942 if (auto RegImm = isAddImmediate(MI, Reg)) { in describeLoadedValue() local
943 Register SrcReg = RegImm->Reg; in describeLoadedValue()
944 int64_t Offset = RegImm->Imm; in describeLoadedValue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1515 } else if (auto RegImm = isAddImmediate(MI, Reg)) { in describeLoadedValue() local
1516 Register SrcReg = RegImm->Reg; in describeLoadedValue()
1517 Offset = RegImm->Imm; in describeLoadedValue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 940 case RISCVMatInt::RegImm: in materializeImm()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 3103 case RISCVMatInt::RegImm: in emitLoadImm()
|