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Searched refs:RegEnd (Results 1 – 5 of 5) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveIntervalUnion.cpp36 LiveRange::const_iterator RegEnd = Range.end(); in unify() local
41 if (++RegPos == RegEnd) in unify()
49 --RegEnd; in unify()
50 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg); in unify()
51 for (; RegPos != RegEnd; ++RegPos, ++SegPos) in unify()
64 LiveRange::const_iterator RegEnd = Range.end(); in extract() local
75 if (RegPos == RegEnd) in extract()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h456 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) { in addInRegsParamInfo() argument
457 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd)); in addInRegsParamInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp2504 MCRegister RegEnd; in parseReglist() local
2527 RegEnd = matchRegisterNameHelper(IsEABI, EndName); in parseReglist()
2528 if (!RegEnd) in parseReglist()
2530 if (IsEABI && RegEnd != RISCV::X9) in parseReglist()
2539 if (RegEnd != RISCV::X9) in parseReglist()
2563 RegEnd = MatchRegisterName(EndName); in parseReglist()
2567 if (RegEnd == RISCV::X26) in parseReglist()
2574 if (RegEnd == RISCV::NoRegister) in parseReglist()
2575 RegEnd = RegStart; in parseReglist()
2577 auto Encode = RISCVZC::encodeRlist(RegEnd, IsEABI); in parseReglist()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp1173 unsigned RegEnd; in getIndirectIndexBegin() local
1174 for (RegIndex = 0, RegEnd = IndirectRC->getNumRegs(); RegIndex != RegEnd; in getIndirectIndexBegin()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp2587 unsigned RegBegin, RegEnd; in LowerCall() local
2588 CCInfo.getInRegsParamInfo(CurByValIdx, RegBegin, RegEnd); in LowerCall()
2593 for (i = 0, j = RegBegin; j < RegEnd; i++, j++) { in LowerCall()
2605 offset = RegEnd - RegBegin; in LowerCall()