Searched refs:RegC (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 147 bool isProfitableToCommute(Register RegA, Register RegB, Register RegC,
562 Register RegC, in isProfitableToCommute() argument
586 if (!isPlainlyKilled(MI, RegC)) in isProfitableToCommute()
602 MCRegister FromRegC = getMappedReg(RegC, SrcRegMap); in isProfitableToCommute()
623 if (!noUseAfterLastDef(RegC, Dist, LastDefC)) in isProfitableToCommute()
647 if (isRevCopyChain(RegC, RegA, MaxDataFlowEdge)) in isProfitableToCommute()
670 Register RegC = MI->getOperand(RegCIdx).getReg(); in commuteInstruction() local
685 MCRegister FromRegC = getMappedReg(RegC, SrcRegMap); in commuteInstruction()
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| H A D | TargetInstrInfo.cpp | 1097 Register RegC = OpC.getReg(); in reassociateOps() local
1107 if (RegC.isVirtual()) in reassociateOps()
1108 MRI.constrainRegClass(RegC, RC); in reassociateOps()
1141 BuildMI(*MF, MIMetadata(Root), TII->get(NewRootOpc), RegC) in reassociateOps()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 784 Register RegC = OpC.getReg(); in reassociateFMA() local
785 const TargetRegisterClass *RC = MRI.getRegClass(RegC); in reassociateFMA()
786 MRI.constrainRegClass(RegC, RC); in reassociateFMA()
924 get(FMAOpIdxInfo[Idx][InfoArrayIdxFAddInst]), RegC) in reassociateFMA()
966 get(FMAOpIdxInfo[Idx][InfoArrayIdxFAddInst]), RegC) in reassociateFMA()
1004 NewCRegPressure = BuildMI(*MF, Root.getDebugLoc(), get(FmaOp), RegC) in reassociateFMA()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6891 Register RegC = AddMI->getOperand(IdxOtherOpd).getReg(); in genSubAdd2SubSub() local
6911 .addReg(RegC, getKillRegState(RegCIsKill)); in genSubAdd2SubSub()
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