Searched refs:Recip (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 988 Value *Recip = Builder.CreateUnaryIntrinsic(Intrinsic::amdgcn_rcp, Den); in optimizeWithRcp() local 989 return Builder.CreateFMul(Num, Recip); in optimizeWithRcp() 992 Value *Recip = emitRcpIEEE1ULP(Builder, Den, false); in optimizeWithRcp() local 993 return Builder.CreateFMul(Num, Recip); in optimizeWithRcp()
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| H A D | SIISelLowering.cpp | 10304 SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in lowerFastUnsafeFDIV() local 10305 return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, Flags); in lowerFastUnsafeFDIV()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 638 SDValue buildSqrtEstimateImpl(SDValue Op, SDNodeFlags Flags, bool Recip); 17043 APFloat Recip(N1APF.getSemantics(), 1); // 1.0 in visitFDIV() local 17044 APFloat::opStatus st = Recip.divide(N1APF, APFloat::rmNearestTiesToEven); in visitFDIV() 17053 TLI.isFPImmLegal(Recip, VT, ForCodeSize))) in visitFDIV() 17055 DAG.getConstantFP(Recip, DL, VT)); in visitFDIV()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrVSX.td | 2685 // Recip. square root estimate
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